IS45C4400
X
IS45LV4400
X
S
ERIES
4M x 4 (16-MBIT) DYNAMIC RAM
WITH EDO PAGE MODE
FEATURES
•
Extended Data-Out (EDO) Page Mode access cycle
•
TTL compatible inputs and outputs
•
Refresh Interval:
2,048 cycles/32 ms
4,096 cycles/64 ms
•
Refresh Mode:
RAS-Only,
CAS-before-RAS
(CBR), and Hidden
ISSI
DESCRIPTION
®
PRELIMINARY INFORMATION
OCTOBER 2002
The
ISSI
4400 Series is a 4,194,304 x 4-bit high-performance
CMOS Dynamic Random Access Memory. These
devices offer an accelerated cycle access called EDO
Page Mode. EDO Page Mode allows 2,048 or 4096
random accesses within a single row with access cycle
time as short as 20 ns per 4-bit word.
These features make the 4400 Series ideally suited for
high-bandwidth graphics, digital signal processing,
high-performance computing systems, and peripheral
applications.
The 4400 Series is packaged in a 24-pin 300-mil SOJ with
JEDEC standard pinouts.
•
Single power supply:
5V±10% or
3.3V ± 10%
•
Byte Write and Byte Read operation via two
CAS
•
Automotive Temperature Range
Option A:
0°C to +70°C
Option A1:
-40°C to +85°C
PRODUCT SERIES OVERVIEW
Part No.
IS45C44002
IS45C44004
IS45LV44002
IS45LV44004
Refresh
2K
4K
2K
4K
Voltage
5V ± 10%
5V ± 10%
3.3V ± 10%
3.3V ± 10%
KEY TIMING PARAMETERS
Parameter
RAS
Access Time (t
RAC
)
CAS
Access Time (t
CAC
)
Column Address Access Time (t
AA
)
EDO Page Mode Cycle Time (t
PC
)
Read/Write Cycle Time (t
RC
)
-50
50
13
25
20
84
-60
60
15
30
25
104
Unit
ns
ns
ns
ns
ns
Copyright © 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. 00A
10/21/02
1
IS45C4400
X
IS45LV4400
X
S
ERIES
Functional Description
The IS45C4400x and IS45LV4400x are CMOS DRAMs
optimized for high-speed bandwidth, low power appli-
cations. During READ or WRITE cycles, each bit is uniquely
addressed through the 11 or 12 address bits. These are
entered 11 bits (A0-A10) at a time for the 2K refresh device
or 12 bits (A0-A11) at a time for the 4K refresh device. The
row address is latched by the Row Address Strobe (RAS).
The column address is latched by the Column Address
Strobe (CAS).
RAS
is used to latch the first nine bits and
CAS
is used the latter ten bits.
ISSI
Auto Refresh Cycle
®
To retain data, 2,048 refresh cycles are required in each
32 ms period, or 4,096 refresh cycles are required in
each 64ms period. There are two ways to refresh the
memory:
1. By clocking each of the 2,048 row addresses (A0
through A10) or 4096 row addresses (A0 through
A11) with RAS at least once every 32 ms or 64ms
respectively. Any read, write, read-modify-write or
RAS-only cycle refreshes the addressed row.
2. Using a
CAS-before-RAS
refresh cycle.
CAS-before-RAS
refresh is activated by the falling edge of
RAS,
while
holding
CAS
LOW. In
CAS-before-RAS
refresh cycle,
an internal 9-bit counter provides the row addresses
and the external address inputs are ignored.
CAS-before-RAS
is a refresh-only mode and no data
access or device selection is allowed. Thus, the output
remains in the High-Z state during the cycle.
Memory Cycle
A memory cycle is initiated by bring
RAS
LOW and it is
terminated by returning both
RAS
and
CAS
HIGH. To
ensures proper device operation and data integrity any
memory cycle, once initiated, must not be ended or
aborted before the minimum t
RAS
time has expired. A new
cycle must not be initiated until the minimum precharge
time t
RP
, t
CP
has elapsed.
Read Cycle
A read cycle is initiated by the falling edge of
CAS
or
OE,
whichever occurs last, while holding
WE
HIGH. The
column address must be held for a minimum time
specified by t
AR
. Data Out becomes valid only when t
RAC
,
t
AA
, t
CAC
and t
OEA
are all satisfied. As a result, the access
time is dependent on the timing relationships between
these parameters.
Power-On
After application of the V
DD
supply, an initial pause of 200
µs is required followed by a minimum of eight initialization
cycles (any combination of cycles containing a
RAS
signal).
During power-on, it is recommended that
RAS
track with
V
DD
or be held at a valid V
IH
to avoid current surges.
Write Cycle
A write cycle is initiated by the falling edge of
CAS
and
WE,
whichever occurs last. The input data must be valid
at or before the falling edge of
CAS
or
WE,
whichever
occurs last.
IIntegrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. 00A
10/21/02
3
IS45C4400
X
IS45LV4400
X
S
ERIES
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
T
V
DD
I
OUT
P
D
T
STG
Parameters
Voltage on Any Pin Relative to GND
Supply Voltage
Output Current
Power Dissipation
Storage Temperature
5V
3.3V
5V
3.3V
Rating
–1.0 to +7.0
–0.5 to +4.6
–1.0 to +7.0
–0.5 to +4.6
50
1
–55 to +125
Unit
V
V
mA
W
°C
ISSI
®
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated
in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
RECOMMENDED OPERATING CONDITIONS
(Voltages are referenced to GND.)
Symbol
V
DD
V
IH
V
IL
T
A
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Temperature Range
5V
3.3V
5V
3.3V
5V
3.3V
Option A:
Option A1:
Min.
4.5
3.0
2.4
2.0
–1.0
–0.3
Typ.
5.0
3.3
—
—
—
—
0 to 70
-40 to 85
Max.
5.5
3.6
V
DD
+ 1.0
V
DD
+ 0.3
0.8
0.8
°C
Unit
V
V
V
CAPACITANCE
(1,2)
Symbol
C
IN
1
C
IN
2
C
IO
Parameter
Input Capacitance: A0-A10(A11)
Input Capacitance:
RAS, CAS, WE, OE
Data Input/Output Capacitance: DQ0-DQ3
Max.
5
7
7
Unit
pF
pF
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A
= 25°C, f = 1 MHz.
IIntegrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. 00A
10/21/02
5
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