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9DB108YGLNT

Description
PLL Based Clock Driver, 9DB Series, 8 True Output(s), 0 Inverted Output(s), PDSO48, 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-48
Categorylogic    logic   
File Size144KB,16 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
Download Datasheet Parametric Compare View All

9DB108YGLNT Overview

PLL Based Clock Driver, 9DB Series, 8 True Output(s), 0 Inverted Output(s), PDSO48, 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-48

9DB108YGLNT Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeTSSOP
package instructionTSSOP,
Contacts48
Reach Compliance Codecompliant
series9DB
Input adjustmentDIFFERENTIAL
JESD-30 codeR-PDSO-G48
JESD-609 codee3
length12.5 mm
Logic integrated circuit typePLL BASED CLOCK DRIVER
Number of functions1
Number of inverted outputs
Number of terminals48
Actual output times8
Maximum operating temperature70 °C
Minimum operating temperature
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.05 ns
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width6.1 mm
Integrated
Circuit
Systems, Inc.
ICS9DB108
(Not recommended for new designs)
Eight Output Differential Buffer for PCI-Express
Recommended Application:
DB800 Intel Yellow Cover part with PCI-Express support.
Output Features:
8 - 0.7V current-mode differential output pairs
Supports zero delay buffer mode and fanout mode
Bandwidth programming available
Key Specifications:
Outputs cycle-cycle jitter < 50ps
Outputs skew: 50ps
+/- 300ppm frequency accuracy on output clocks
Features/Benefits:
Supports tight ppm accuracy clocks for Serial-ATA
Spread spectrum modulation tolerant, 0 to -0.5% down
spread and +/- 0.25% center spread
Supports undriven differential output pair in PD# and
SRC_STOP# for power management.
Pin Configuration
d
e
d s
n n
e g
m si
m de
o
c w
e e
r
t n
o
N
SRC_DIV#
VDD
GND
SRC_IN
SRC_IN#
OE_0
OE_3
DIF_0
DIF_0#
GND
VDD
DIF_1
DIF_1#
OE_1
OE_2
DIF_2
DIF_2#
GND
VDD
DIF_3
DIF_3#
BYPASS#/PLL
SCLK
SDATA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48-pin SSOP & TSSOP
0723G—12/02/08
ICS9DB108
r
fo
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VDDA
GNDA
IREF
LOCK
OE_7
OE_4
DIF_7
DIF_7#
GND
VDD
DIF_6
DIF_6#
OE_6
OE_5
DIF_5
DIF_5#
GND
VDD
DIF_4
DIF_4#
HIGH_BW#
SRC_STOP#
PD#
GND

9DB108YGLNT Related Products

9DB108YGLNT 9DB108BFLF-T 9DB108YGLFT 9DB108YGT 9DB108YFLFT 9DB108YFLNT 9DB108YFT
Description PLL Based Clock Driver, 9DB Series, 8 True Output(s), 0 Inverted Output(s), PDSO48, 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-48 PLL Based Clock Driver, 9DB Series, 8 True Output(s), 0 Inverted Output(s), PDSO48, ROHS COMPLIANT, MO-118, SSOP-48 PLL Based Clock Driver, 9DB Series, 8 True Output(s), 0 Inverted Output(s), PDSO48, 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-48 PLL Based Clock Driver, 9DB Series, 8 True Output(s), 0 Inverted Output(s), PDSO48, 6.10 MM, 0.50 MM PITCH, MO-153, TSSOP-48 PLL Based Clock Driver, 9DB Series, 8 True Output(s), 0 Inverted Output(s), PDSO48, ROHS COMPLIANT, MO-118, SSOP-48 PLL Based Clock Driver, 9DB Series, 8 True Output(s), 0 Inverted Output(s), PDSO48, ROHS COMPLIANT, MO-118, SSOP-48 PLL Based Clock Driver, 9DB Series, 8 True Output(s), 0 Inverted Output(s), PDSO48, MO-118, SSOP-48
Is it lead-free? Lead free Lead free Lead free Contains lead Lead free Lead free Contains lead
Is it Rohs certified? conform to conform to conform to incompatible conform to conform to incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code TSSOP SSOP TSSOP TSSOP SSOP SSOP SSOP
package instruction TSSOP, SSOP, SSOP48,.4 TSSOP, TSSOP, SSOP, SSOP, SSOP,
Contacts 48 48 48 48 48 48 48
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant
series 9DB 9DB 9DB 9DB 9DB 9DB 9DB
Input adjustment DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL
JESD-30 code R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48
JESD-609 code e3 e3 e3 e0 e3 e3 e0
length 12.5 mm 15.875 mm 12.5 mm 12.5 mm 15.875 mm 15.875 mm 15.875 mm
Logic integrated circuit type PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER
Number of functions 1 1 1 1 1 1 1
Number of terminals 48 48 48 48 48 48 48
Actual output times 8 8 8 8 8 8 8
Maximum operating temperature 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP SSOP TSSOP TSSOP SSOP SSOP SSOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 260 260 260 225 260 260 225
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.05 ns 0.05 ns 0.05 ns 0.05 ns 0.05 ns 0.05 ns 0.05 ns
Maximum seat height 1.2 mm 2.8 mm 1.2 mm 1.2 mm 2.8 mm 2.8 mm 2.8 mm
Maximum supply voltage (Vsup) 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V
Minimum supply voltage (Vsup) 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES YES YES YES
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface Matte Tin (Sn) Matte Tin (Sn) - annealed Matte Tin (Sn) Tin/Lead (Sn/Pb) Matte Tin (Sn) Matte Tin (Sn) Tin/Lead (Sn/Pb)
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.5 mm 0.635 mm 0.5 mm 0.5 mm 0.635 mm 0.635 mm 0.635 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature 30 30 30 30 30 30 30
width 6.1 mm 7.5 mm 6.1 mm 6.1 mm 7.5 mm 7.5 mm 7.5 mm
minfmax - - 220 MHz 220 MHz 220 MHz - 220 MHz

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