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934055125115

Description
TRANSISTOR 100 mA, 50 V, PNP, Si, SMALL SIGNAL TRANSISTOR, PLASTIC, SC-89, 3 PIN, BIP General Purpose Small Signal
CategoryDiscrete semiconductor    The transistor   
File Size49KB,8 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
Download Datasheet Parametric View All

934055125115 Overview

TRANSISTOR 100 mA, 50 V, PNP, Si, SMALL SIGNAL TRANSISTOR, PLASTIC, SC-89, 3 PIN, BIP General Purpose Small Signal

934055125115 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerNXP
Parts packaging codeSC-89
package instructionPLASTIC, SC-89, 3 PIN
Contacts3
Reach Compliance Codeunknown
ECCN codeEAR99
Other featuresBUILT IN BIAS RESISTOR RATIO IS 21.36
Maximum collector current (IC)0.1 A
Collector-emitter maximum voltage50 V
ConfigurationSINGLE WITH BUILT-IN RESISTOR
Minimum DC current gain (hFE)100
JESD-30 codeR-PDSO-F3
JESD-609 codee3
Number of components1
Number of terminals3
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typePNP
Certification statusNot Qualified
surface mountYES
Terminal surfaceTIN
Terminal formFLAT
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON

934055125115 Preview

DISCRETE SEMICONDUCTORS
DATA SHEET
M3D425
PDTA123JEF
PNP resistor-equipped transistor
Preliminary specification
1999 Apr 20
Philips Semiconductors
Preliminary specification
PNP resistor-equipped transistor
FEATURES
Built-in bias resistors R1 and R2
(typ. 2.2 kΩ and 47 kΩ
respectively)
Simplification of circuit design
Reduces number of components
and board space.
1
2
MAM413
PDTA123JEF
handbook, halfpage
3
R1
1
R2
3
2
APPLICATIONS
Especially suitable for space
reduction in interface and driver
circuits
Inverter circuit configurations
without use of external resistors.
DESCRIPTION
PNP resistor-equipped transistor in
an SC-89 (SOT490) plastic package.
PINNING
PIN
1
2
3
DESCRIPTION
base/input
emitter/ground (+)
collector/output
Fig.2
Top view
Fig.1 Simplified outline (SC-89; SOT490) and symbol.
MARKING
TYPE
NUMBER
PDTA123JEF
2
MGA893 - 1
1
3
MARKING
CODE
27
Equivalent inverter
symbol.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
V
CBO
V
CEO
V
EBO
V
I
PARAMETER
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
positive
negative
I
O
I
CM
P
tot
T
stg
T
j
T
amb
Note
1. Refer to SC-89 (SOT490) standard mounting conditions.
1999 Apr 20
2
output current (DC)
peak collector current
total power dissipation
storage temperature
junction temperature
operating ambient temperature
T
amb
25
°C;
note 1
−65
−65
5
−12
−100
−100
250
+150
150
+150
V
V
mA
mA
mW
°C
°C
°C
CONDITIONS
open emitter
open base
open collector
MIN.
MAX.
−50
−50
−10
V
V
V
UNIT
Philips Semiconductors
Preliminary specification
PNP resistor-equipped transistor
THERMAL CHARACTERISTICS
SYMBOL
R
th j-a
Note
1. Refer to SC-89 (SOT490) standard mounting conditions.
CHARACTERISTICS
T
amb
= 25
°C
unless otherwise specified.
SYMBOL
I
CBO
I
CEO
I
EBO
h
FE
V
CEsat
V
i(off)
V
i(on)
R1
R2
-------
-
R1
C
c
PARAMETER
collector cut-off current
collector cut-off current
emitter cut-off current
DC current gain
collector-emitter saturation voltage
input-off voltage
input-on voltage
input resistor
resistor ratio
collector capacitance
I
E
= i
e
= 0; V
CB
=
−10
V; f = 1 MHz
CONDITIONS
I
E
= 0; V
CB
=
−50
V
I
B
= 0; V
CE
=
−30
V
I
B
= 0; V
CE
=
−30
V; T
j
= 150
°C
I
C
= 0; V
EB
=
−5
V
I
C
=
−10
mA; V
CE
=
−5
V
I
C
=
−5
mA; I
B
=
−0.25
mA
I
C
=
−100 µA;
V
CE
=
−5
V
I
C
=
−5
mA; V
CE
=
−0.3
V
MIN.
100
−1.1
1.54
17
PARAMETER
thermal resistance from junction to ambient
CONDITIONS
note 1
PDTA123JEF
VALUE
500
UNIT
K/W
TYP.
−0.6
−0.75
2.2
21
MAX.
−100
−1
−50
−180
−100
−0.5
2.86
26
3
UNIT
nA
µA
µA
µA
mV
V
V
kΩ
pF
1999 Apr 20
3
Philips Semiconductors
Preliminary specification
PNP resistor-equipped transistor
PDTA123JEF
handbook, halfpage
10
3
MDA920
handbook, halfpage
(1)
(2)
−10
3
MDA919
hFE
VCEsat
(mV)
10
2
(3)
−10
2
10
(1)
(3) (2)
1
−10
−1
−1
−10
IC (mA)
−10
2
−10
−10
−1
−1
−10
IC (mA)
−10
2
V
CE
=
−5
V.
(1) T
amb
= 100
°C.
(2) T
amb
= 25
°C.
(3) T
amb
=
−40 °C.
I
C
/I
B
= 20.
(1) T
amb
= 100
°C.
(2) T
amb
= 25
°C.
(3) T
amb
=
−40 °C.
Fig.3
DC current gain as a function of collector
current; typical values.
Fig.4
Collector-emitter saturation voltage as a
function of collector current; typical values.
−10
4
handbook, halfpage
MDA922
−10
4
handbook, halfpage
MDA921
Vi(off)
(mV)
Vi(on)
(mV)
−10
3
(1)
(2)
(3)
−10
3
(1)
(2)
(3)
−10
2
−10
−2
−10
−1
−1
IC (mA)
−10
−10
2
−10
−1
−1
−10
IC (mA)
−10
2
V
CE
=
−5
V.
(1) T
amb
=
−40 °C.
(2) T
amb
= 25
°C.
(3) T
amb
= 100
°C.
V
CE
=
−0.3
V.
(1) T
amb
=
−40 °C.
(2) T
amb
= 25
°C.
(3) T
amb
= 100
°C.
Fig.5
Input-off voltage as a function of collector
current; typical values.
Fig.6
Input-on voltage as a function of collector
current; typical values.
1999 Apr 20
4
Philips Semiconductors
Preliminary specification
PNP resistor-equipped transistor
PACKAGE OUTLINE
Plastic surface mounted package; 3 leads
PDTA123JEF
SOT490
D
B
E
A
X
HE
v
M
A
3
A
1
e1
e
bp
2
w
M
B
Lp
detail X
c
0
1
scale
2 mm
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A
0.8
0.6
b
p
0.33
0.23
c
0.2
0.1
D
1.7
1.5
E
0.95
0.75
e
1.0
e
1
0.5
H
E
1.7
1.5
L
p
0.5
0.3
v
0.1
w
0.1
OUTLINE
VERSION
SOT490
REFERENCES
IEC
JEDEC
EIAJ
SC-89
EUROPEAN
PROJECTION
ISSUE DATE
98-10-23
1999 Apr 20
5
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