®
X9271
Single Supply/Low Power/256-Tap/SPI Bus
Data Sheet
November 22, 2005
FN8174.2
Single Digitally-Controlled (XDCP™)
Potentiometer
FEATURES
• 256 Resistor Taps
• SPI Serial Interface for write, read, and transfer
operations of the potentiometer
• Wiper Resistance, 100Ω typical @ V
CC
= 5V
• 16 Nonvolatile Data Registers
• Nonvolatile Storage of Multiple Wiper Positions
• Power-on Recall. Loads Saved Wiper Position on
Power-up.
• Standby Current < 3µA Max
• V
CC
: 2.7V to 5.5V Operation
• 50kΩ, 100kΩ versions of End to End Resistance
• 100 yr. Data Retention
• Endurance: 100,000 Data Changes per Bit per
Register
• 14-Lead TSSOP
• Low Power CMOS
• Pb-Free Plus Anneal Available (RoHS Compliant)
FUNCTIONAL DIAGRAM
V
CC
DESCRIPTION
The X9271 integrates a single digitally controlled
potentiometer (XDCP) on a monolithic CMOS
integrated circuit.
The digital controlled potentiometer is implemented
using 255 resistive elements in a series array. Between
each element are tap points connected to the wiper
terminal through switches. The position of the wiper on
the array is controlled by the user through the SPI bus
interface. The potentiometer has associated with it a
volatile Wiper Counter Register (WCR) and a four
nonvolatile Data Registers that can be directly written to
and read by the user. The contents of the WCR controls
the position of the wiper on the resistor array though the
switches. Powerup recalls the contents of the default
data register (DR0) to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
R
H
SPI
Bus
Interface
Address
Data
Status
Write
Read
Transfer
Inc/Dec
Bus
Interface
and Control
Control
Power-on Recall
Wiper Counter
Register (WCR)
Data Registers
16 Bytes
50kΩ and 100kΩ
256-taps
POT
V
SS
R
W
R
L
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X9271
Ordering Information
PART NUMBER
X9271UV14*
X9271UV14I*
X9271UV14IZ* (Note)
X9271UV14Z* (Note)
X9271TV14*
X9271TV14I*
X9271TV14IZ* (Note)
X9271TV14Z* (Note)
X9271UV14-2.7*
X9271UV14I-2.7*
PART MARKING
X9271UV
X9271UV I
X9271UV ZI
X9271UV Z
X9271TV
X9271TV I
X9271TV ZI
X9271TV Z
X9271UV F
X9271UV G
2.7 to 5.5
50
100
V
CC
LIMITS
(V)
5 ±10%
POTENTIOMETER
ORGANIZATION
(kΩ)
50
TEMPERATURE
RANGE (°C)
0 to +70
-40 to 85
-40 to 85
0 to +70
0 to +70
-40 to 85
-40 to 85
0 to +70
0 to +70
-40 to 85
-40 to 85
0 to +70
100
0 to +70
-40 to 85
-40 to 85
0 to +70
PACKAGE
14 Ld TSSOP (4.4mm)
14 Ld TSSOP (4.4mm)
14 Ld TSSOP (4.4mm) (Pb-free)
14 Ld TSSOP (4.4mm) (Pb-free)
14 Ld TSSOP (4.4mm)
14 Ld TSSOP (4.4mm)
14 Ld TSSOP (4.4mm) (Pb-free)
14 Ld TSSOP (4.4mm) (Pb-free)
14 Ld TSSOP (4.4mm)
14 Ld TSSOP (4.4mm)
14 Ld TSSOP (4.4mm) (Pb-free)
14 Ld TSSOP (4.4mm) (Pb-free)
14 Ld TSSOP (4.4mm)
14 Ld TSSOP (4.4mm)
14 Ld TSSOP (4.4mm) (Pb-free)
14 Ld TSSOP (4.4mm) (Pb-free)
X9271UV14IZ-2.7* (Note) X9271UV ZF
X9271UV14Z-2.7* (Note)
X9271TV14-2.7*
X9271TV14I-2.7*
X9271UV ZF
X9271TV F
X9271TV G
X9271TV14IZ-2.7* (Note) X9271TV ZG
X9271TV14Z-2.7* (Note)
X9271TV ZF
*Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
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FN8174.2
November 22, 2005
X9271
DETAILED FUNCTIONAL DIAGRAM
V
CC
Bank 0 Power-on Recall
R
0
R
1
HOLD
CS
SCK
SO
SI
A0
A1
WP
WIPER
COUNTER
REGISTER
(WCR)
50kΩ and 100kΩ
256-taps
R
H
INTERFACE
AND
CONTROL
CIRCUITRY
DATA
R
2
R
3
R
L
R
W
Bank 1
R
0
R
1
Bank 2
R
0
R
1
Bank 3
R
0
R
1
Control
R
2
R
3
R
2
R
3
R
2
R
3
12 additional nonvolatile registers
3 Banks of 4 registers x 8-bits
V
SS
CIRCUIT LEVEL APPLICATIONS
• Vary the gain of a voltage amplifier
• Provide programmable dc reference voltages for
comparators and detectors
• Control the volume in audio circuits
• Trim out the offset voltage error in a voltage amplifier
circuit
• Set the output voltage of a voltage regulator
• Trim the resistance in Wheatstone bridge circuits
• Control the gain, characteristic frequency and
Q-factor in filter circuits
• Set the scale factor and zero point in sensor signal
conditioning circuits
• Vary the frequency and duty cycle of timer ICs
• Vary the dc biasing of a pin diode attenuator in RF
circuits
• Provide a control variable (I, V, or R) in feedback
circuits
SYSTEM LEVEL APPLICATIONS
• Adjust the contrast in LCD displays
• Control the power level of LED transmitters in
communication systems
• Set and regulate the DC biasing point in an RF
power amplifier in wireless systems
• Control the gain in audio and home entertainment
systems
• Provide the variable DC bias for tuners in RF
wireless systems
• Set the operating points in temperature control
systems
• Control the operating point for sensors in industrial
systems
• Trim offset and gain errors in artificial intelligent
systems
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FN8174.2
November 22, 2005
X9271
PIN CONFIGURATION
TSSOP
S0
A0
NC
CS
SCK
SI
V
SS
1
2
3
4
5
6
7
X9271
14
13
12
11
10
9
8
V
CC
R
L
R
H
R
W
HOLD
A1
WP
PIN ASSIGNMENTS
TSSOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Symbol
SO
A0
NC
CS
SCK
SI
V
SS
WP
A1
HOLD
R
W
R
H
R
L
V
CC
Serial Data Output.
Device Address.
No Connect.
Chip Select.
Serial Clock.
Serial Data Input.
System Ground.
Hardware Write Protect.
Device Address.
Function
Device select. Pause the serial bus.
Wiper Terminal of the Potentiometer.
High Terminal of the Potentiometer.
Low Terminal of the Potentiometer.
System Supply Voltage.
4
FN8174.2
November 22, 2005
X9271
PIN DESCRIPTIONS
Bus Interface Pins
S
ERIAL
O
UTPUT
(SO)
SO is a serial data output pin. During a read cycle,
data is shifted out on this pin. Data is clocked out by
the falling edge of the serial clock.
S
ERIAL
I
NPUT
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the pots and pot
registers are input on this pin. Data is latched by the
rising edge of the serial clock.
S
ERIAL
C
LOCK
(SCK)
The SCK input is used to clock data into and out of the
X9271.
H
OLD
(HOLD)
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause the
serial communication with the controller without resetting
the serial sequence. To pause, HOLD must be brought
LOW while SCK is LOW. To resume communication,
HOLD is brought HIGH, again while SCK is LOW. If the
pause feature is not used, HOLD should be held HIGH at
all times. CMOS level input.
D
EVICE
A
DDRESS
(A1 - A0)
The address inputs are used to set the the 8-bit slave
address. A match in the slave address serial data
stream must be made with the address input in order
to initiate communication with the X9271.
C
HIP
S
ELECT
(CS)
When CS is HIGH, the X9271 is deselected and the
SO pin is at high impedance, and (unless an internal
write cycle is underway) the device will be in the
standby state. CS LOW enables the X9271, placing it
in the active power mode. It should be noted that after
a power-up, a HIGH to LOW transition on CS is
required prior to the start of any operation.
Potentiometer Pins
R
H
, R
L
The R
H
and R
L
pins are equivalent to the terminal
connections on a mechanical potentiometer.
R
W
The wiper pin are equivalent to the wiper terminal of a
mechanical potentiometer.
Supply Pins
S
YSTEM
S
UPPLY
V
OLTAGE
(V
CC
)
AND
S
UPPLY
G
ROUND
(V
SS
)
The V
CC
pin is the system supply voltage. The V
SS
pin is the system ground.
Other Pins
H
ARDWARE
W
RITE
P
ROTECT
I
NPUT
(WP)
The WP pin when LOW prevents nonvolatile writes to
the Data Registers.
N
O
C
ONNECT
.
No connect pins should be left floating. This pins are
used for Intersil manufacturing and testing purposes.
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FN8174.2
November 22, 2005
stm32/stm8
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