EEWORLDEEWORLDEEWORLD

Part Number

Search

PFKC03-12D15

Description
3 WATTS DC-DC CONVERTER
File Size172KB,3 Pages
ManufacturerRSG Electronic Components GmbH
Websitehttp://www.rsg-electronic.de/de/
Download Datasheet View All

PFKC03-12D15 Overview

3 WATTS DC-DC CONVERTER

PFKC03 SERIES
3 WATTS
DC-DC CONVERTER
FEATURES
3 WATTS REGULATED OUTPUT POWER
OUTPUT CURRENT UP TO 600mA
STANDARD 1.25 X 0.80 X 0.40 INCH
HIGH EFFICIENCY UP TO 80%
2:1 WIDE INPUT VOLTAGE RANGE
SWITCHING FREQUENCY (100kHz, MIN)
OVER CURRENT PROTECTION
STANDARD 24 PIN DIP PACKAGE & SMD TYPE PACKAGE
CE MARK MEETS 2006/95/EC, 2011/95/EC AND 2004/108/EC
SAFETY MEETS UL60950-1, EN60950-1 AND IEC60950-1
ISO9001 CERTIFIED MANUFACTURING FACILITIES
COMPLIANT TO RoHS EU DIRECTIVE 2011/65/EU
APPLICATIONS
Wireless Network
Telecom/Datacom
Industry Control System
Measurement Equipment
Semiconductor Equipment
OPTIONS
SMD TYPE
DESCRIPTION
The PFKC03 series offer 3 watts of output power from a package in an IC
compatible 24 pin DIP configuration without derating to 71ºC ambient
temperature and pin to pin compatible to PFKC05, FKC03, FKC05 series.
PFKC03 series have 2:1 wide input voltage of 4.5~6, 9~18, 18~36 and
36~75VDC.
T E C H N I C A L S P E C I F I C AT I O N
OUTPUT SPECIFICATIONS
Output power
Voltage accuracy
Minimum load (Note 7)
Line regulation
LL to HL at Full Load
All specifications are typical at nominal input, full load and 25ºC otherwise noted
INPUT SPECIFICATIONS
3 Watts, max.
± 1%
Input voltage range
Input filter
5VDC input
12VDC input
Input surge voltage
24VDC input
48VDC input
Input reflected ripple current
Nominal input and
Start up time
constant resistive load
18VDC
36VDC
50VDC
100VDC
Power up
5VDC nominal input
12VDC nominal input
24VDC nominal input
48VDC nominal input
4.5 ~ 6VDC
9 ~
18VDC
18 ~ 36VDC
36 ~75VDC
Pi type
100ms, max.
100ms, max.
100ms, max.
100ms, max.
120mAp-p
See table
± 0.2%
Single 3.3Vout ± 0.3%
Load regulation
Min. Load to Full Load
Others ± 0.2%
Dual
± 2%
Cross regulation (Dual) Asymmetrical load 25% / 100% FL
± 5%
Ripple and noise
20MHz bandwidth
See table
0.02% / ºC, max.
Temperature coefficient
Transient response recovery time 25% load step change
500µs
Over load protection
% of FL at nominal input
180%
Short circuit protection
Continuous, automatics recovery
30ms
GENERAL SPECIFICATIONS
Efficiency
Standard
Isolation voltage Input to Output
Suffix “ H ”
Isolation resistance
500VDC
Isolation capacitance
Switching frequency
Design meet safety standard
Case material
Base material
Potting material
Dimensions
Weight
MTBF (Note 1)
See table
1600VDC, min. 1minute
3000VDC, min. 1minute
10 ohms, min.
300pF, max.
100kHz, min.
IEC60950-1, UL60950-1, EN60950-1
Non-conductive black plastic
Non-conductive black plastic
Epoxy (UL94-V0)
1.25 X 0.80 X 0.40 Inch
(31.8 X 20.3 X 10.2 mm)
DIP
14g (0.48oz)
SMD
15g (0.52oz)
BELLCORE TR-NWT-000332
3.690 x 10
6
hrs
MIL-HDBK-217F
3.082 x 10
6
hrs
9
ESD
Radiated immunity
Fast transient (Note 6)
Surge (Note 6)
Conducted immunity
EN61000-4-2
EN61000-4-3
EN61000-4-4
EN61000-4-5
EN61000-4-6
10 Vr.m.s
Page 1 of 3
www.pduke.com
±
±
±
±
±
ENVIRONMENTAL SPECIFICATIONS
Operating ambient temperature
Storage temperature range
Thermal shock
Vibration
Relative humidity
-25ºC ~ +71ºC(non
derating)
-55ºC ~ +125ºC
MIL-STD-810F
MIL-STD-810F
5% to 95% RH
EMC CHARACTERISTICS
EMI
EN55022
Air
Contact
Class A
8kV
6kV
10 V/m
2kV
1kV
Perf. Criteria
A
Perf. Criteria A
Perf. Criteria B
Perf. Criteria B
Perf. Criteria A
2013/5/3
How to debug with ST-Link in Embedded Studio for ARM?
The ST routines provided by Segger are all debugged using J-Link. What if we only have an ST-Link emulator? In this article, we will introduce how to use ST-Link for debugging in Segger Embedded Studi...
MamoYU Real-time operating system RTOS
Altium Designer 14.1.5.iso Download
[i=s]This post was last edited by qinkaiabc on 2014-1-3 17:02[/i] Altium Designer 14.1.5.30772 [url=http://pan.baidu.com/s/1bnmYyZH]http://pan.baidu.com/s/1bnmYyZH[/url]Cracking method: [backcolor=rgb...
qinkaiabc PCB Design
How to set the bus number in the quartus module?
As shown in the figure above, I used Verilog to write a 4-bit bidirectional shift register code and generated a corresponding module. D[3:0] is the input for parallel setting, and the generated block ...
木木木JS FPGA/CPLD
Guys in Sichuan, how are you?
If you can come here, please let us know you are safe!...
wstt Talking
MCU Data Collection
Don't regret it, all the savings of many years will be sent out...
subry MCU
GateDriveDesignTips-Ridl
GateDriveDesignTips-Ridl...
安_然 Analogue and Mixed Signal

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1656  2556  2698  2636  824  34  52  55  54  17 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号