MX25L3208EM2I-12G datasheet, PDF

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MX25L3208EM2I-12G: DescriptionFlash, 16MX2, PDSO8, 0.200 INCH, HALOGEN FREE AND ROHS COMPLIANT, SOP-8; Categorystorage storage; File Size750KB，47 Pages; ManufacturerMacronix; Websitehttp://www.macronix.com/en-us/Pages/default.aspx; Environmental Compliance

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MX25L3208EM2I-12G Overview

Flash, 16MX2, PDSO8, 0.200 INCH, HALOGEN FREE AND ROHS COMPLIANT, SOP-8

MX25L3208EM2I-12G Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Macronix
Parts packaging code	SOIC
package instruction	0.200 INCH, HALOGEN FREE AND ROHS COMPLIANT, SOP-8
Contacts	8
Reach Compliance Code	unknown
ECCN code	3A991.B.1.B.1
Spare memory width	1
Maximum clock frequency (fCLK)	86 MHz
Data retention time - minimum	20
Durability	100000 Write/Erase Cycles
JESD-30 code	R-PDSO-G8
length	5.28 mm
memory density	33554432 bit
Memory IC Type	FLASH
memory width	2
Number of functions	1
Number of terminals	8
word count	16777216 words
character code	16000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	16MX2
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP8,.3
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	SERIAL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3/3.3 V
Programming voltage	3.3 V
Certification status	Not Qualified
Maximum seat height	2.16 mm
Serial bus type	3-WIRE
Maximum standby current	0.00002 A
Maximum slew rate	0.025 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
type	NOR TYPE
width	5.23 mm
write protect	HARDWARE/SOFTWARE

MX25L3208EM2I-12G Preview

MX25L3208E

DATASHEET

P/N: PM1614

REV. 1.2, NOV. 28, 2013

MX25L3208E

Contents

FEATURES .................................................................................................................................................................. 5

GENERAL DESCRIPTION ......................................................................................................................................... 6

PIN CONFIGURATIONS ............................................................................................................................................. 7

PIN DESCRIPTION ...................................................................................................................................................... 7

BLOCK DIAGRAM....................................................................................................................................................... 8

MEMORY ORGANIZATION ......................................................................................................................................... 9

Table 1. Memory Organization ............................................................................................................................ 9

DEVICE OPERATION ................................................................................................................................................ 10

Figure 1.

Serial Modes Supported ....................................................................................................... 10

DATA PROTECTION.................................................................................................................................................. 11

Table 2. Protected Area Sizes ............................................................................................................................ 12

HOLD FEATURES ..................................................................................................................................................... 13

Figure 2. Hold Condition Operation

........................................................................................................ 13

COMMAND DESCRIPTION ....................................................................................................................................... 14

Table 4. COMMAND DEFINITION ..................................................................................................................... 14

(1) Write Enable (WREN) ................................................................................................................................... 15

(2) Write Disable (WRDI) .................................................................................................................................... 15

(3) Read Status Register (RDSR) ...................................................................................................................... 15

(4) Write Status Register (WRSR)...................................................................................................................... 16

Table 5. Protection Modes .................................................................................................................................. 17

(5) Read Data Bytes (READ) ............................................................................................................................. 18

(6) Read Data Bytes at Higher Speed (FAST_READ) ....................................................................................... 18

(7) Dual Output Mode (DREAD) ......................................................................................................................... 18

(8) Sector Erase (SE) ......................................................................................................................................... 18

(9) Block Erase (BE)........................................................................................................................................... 19

(10) Chip Erase (CE) .......................................................................................................................................... 19

(11) Page Program (PP) ..................................................................................................................................... 19

(12) Deep Power-down (DP) .............................................................................................................................. 20

(13) Release from Deep Power-down (RDP), Read Electronic Signature (RES) ............................................. 20

(14) Read Identification (RDID)

.......................................................................................................................... 21

(15) Read Electronic Manufacturer ID & Device ID (REMS) .............................................................................. 21

Table 6. ID DEFINITIONS ................................................................................................................................. 21

(16)

Enter Secured Area (ENSA) ........................................................................................................ 21

(17)

Exit Secured Area (EXSA)........................................................................................................... 21

(18) Read Security Register (RDSCUR) ............................................................................................................ 22

Table 7. SECURITY REGISTER DEFINITION ................................................................................................... 22

(19) Write Security Register (WRSCUR) ............................................................................................................ 22

POWER-ON STATE ................................................................................................................................................... 23

P/N: PM1614

REV. 1.2, NOV. 28, 2013

MX25L3208E

ELECTRICAL SPECIFICATIONS .............................................................................................................................. 24

ABSOLUTE MAXIMUM RATINGS ..................................................................................................................... 24

Figure 3.Maximum Negative Overshoot Waveform ........................................................................................... 24

CAPACITANCE TA = 25°C, f = 1.0 MHz............................................................................................................. 24

Figure 4. Maximum Positive Overshoot Waveform ............................................................................................ 24

Figure 5. INPUT TEST WAVEFORMS AND MEASUREMENT LEVEL.............................................................. 25

Figure 6. OUTPUT LOADING ........................................................................................................................... 25

Table 8. DC CHARACTERISTICS...................................................................................................................... 26

Table 9. AC CHARACTERISTICS ...................................................................................................................... 27

Timing Analysis ........................................................................................................................................................ 28

Figure 7. Serial Input Timing .............................................................................................................................. 28

Figure 8. Output Timing ...................................................................................................................................... 28

Figure 9. Hold Timing ......................................................................................................................................... 29

Figure 10. WP# Disable Setup and Hold Timing during WRSR when SRWD=1 ............................................... 29

Figure 11. Write Enable (WREN) Sequence (Command 06) ............................................................................. 30

Figure 12. Write Disable (WRDI) Sequence (Command 04).............................................................................. 30

Figure 13. Read Status Register (RDSR) Sequence (Command 05) ................................................................ 31

Figure 14. Write Status Register (WRSR) Sequence (Command 01)............................................................... 31

Figure 15. Read Data Bytes (READ) Sequence (Command 03) ...................................................................... 31

Figure 16. Read at Higher Speed (FAST_READ) Sequence (Command 0B)................................................... 32

Figure 17. Dual Output Read Mode Sequence (Command 3B) ......................................................................... 33

Figure 18. Sector Erase (SE) Sequence (Command 20) .................................................................................. 33

Figure 19. Block Erase (BE) Sequence (Command 52 or D8) .......................................................................... 33

Figure 20. Chip Erase (CE) Sequence (Command 60 or C7) ........................................................................... 34

Figure 21. Page Program (PP) Sequence (Command 02)................................................................................ 34

Figure 22. Deep Power-down (DP) Sequence (Command B9)......................................................................... 35

Figure 23. Release from Deep Power-down (RDP) Sequence (Command AB) ............................................... 35

Figure 24. Read Electronic Signature (RES) Sequence (Command AB) .......................................................... 35

Figure 25. Read Identification (RDID) Sequence (Command 9F)

...................................................................... 36

Figure 26. Read Electronic Manufacturer & Device ID (REMS) Sequence (Command 90).............................. 36

Figure 27. Program/Erase flow with read array data

.......................................................................................... 37

Figure 28. Power-up Timing ............................................................................................................................... 38

Table 10. Power-Up Timing ............................................................................................................................... 38

OPERATING CONDITIONS ....................................................................................................................................... 39

Figure 29. AC Timing at Device Power-Up ......................................................................................................... 39

Figure 30. Power-Down Sequence .................................................................................................................... 40

ERASE AND PROGRAMMING PERFORMANCE .................................................................................................... 41

DATA RETENTION .................................................................................................................................................... 41

LATCH-UP CHARACTERISTICS .............................................................................................................................. 41

P/N: PM1614

REV. 1.2, NOV. 28, 2013

MX25L3208E

ORDERING INFORMATION ...................................................................................................................................... 42

PART NAME DESCRIPTION ..................................................................................................................................... 43

PACKAGE INFORMATION ........................................................................................................................................ 44

REVISION HISTORY ................................................................................................................................................. 46

P/N: PM1614

REV. 1.2, NOV. 28, 2013

MX25L3208E

32M-BIT [x 1 / x 2] CMOS SERIAL FLASH

FEATURES

GENERAL

• Single Power Supply Operation

- 2.7 to 3.6 volt for read, erase, and program operations

• Serial Peripheral Interface compatible -- Mode 0 and Mode 3

•

33,554,432 x 1 bit structure or 16,777,216 x 2 bits (Dual Output mode) structure

• 1024 Equal Sectors with 4K byte each

- Any Sector can be erased individually

• 64 Equal Blocks with 64K byte each

- Any Block can be erased individually

• Program Capability

- Byte base

- Page base (256 bytes)

• Latch-up protected to 100mA from -1V to Vcc +1V

PERFORMANCE

• High Performance

- Fast access time: 86MHz serial clock

- Serial clock of Dual Output mode : 80MHz

- Fast program time: 0.6ms(typ.) and 3ms(max.)/page

- Byte program time: 9us (typical)

- Fast erase time: 40ms(typ.) /sector ; 0.4s(typ.) /block

• Low Power Consumption

- Low active read current: 25mA(max.) at 86MHz

- Low active programming current: 15mA (typ.)

- Low active sector erase current: 9mA (typ.)

- Standby current: 15uA (typ.)

- Deep power-down mode 2uA (typical)

• Typical 100,000 erase/program cycles

• 20 years of data retention

SOFTWARE FEATURES

• Input Data Format

- 1-byte Command code

• Advanced Security Features

- Block lock protection

The BP3~BP0 status bit defines the size of the area to be software protection against program and erase instruc-

tions

- Additional 512 bits secured area for unique ID

• Auto Erase and Auto Program Algorithm

Automatically erases and verifies data at selected sector

Automatically programs and verifies data at selected page by an internal algorithm that automatically times the

program pulse widths (Any page to be programed should have page in the erased state first)

P/N: PM1614

REV. 1.2, NOV. 28, 2013

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