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74FCT574TQB

Description
Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, QSOP-20
Categorylogic    logic   
File Size411KB,7 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

74FCT574TQB Overview

Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, QSOP-20

74FCT574TQB Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeQSOP
package instructionQSOP-20
Contacts20
Reach Compliance Codecompliant
Other featuresBROADSIDE VERSION OF 374
seriesFCT
JESD-30 codeR-PDSO-G20
JESD-609 codee0
Logic integrated circuit typeBUS DRIVER
Number of digits8
Number of functions1
Number of ports2
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)225
Certification statusNot Qualified
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperature30
IDT54/74FCT574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
FAST CMOS OCTAL D
REGISTERS (3-STATE)
IDT54/74FCT574T/AT/CT
FEATURES:
Std., A, and C grades
Low input and output leakage
1µA (max.)
CMOS power levels
True TTL input and output compatibility:
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
High Drive outputs (-15mA I
OH
, 48mA I
OL
)
Meets or exceeds JEDEC standard 18 specifications
Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
Power off disable outputs permit "live insertion"
Available in the following packages:
– Industrial: SOIC, QSOP
– Military: CERDIP, LCC
DESCRIPTION:
The FCT574T is an 8-bit register built using an advanced dual metal
CMOS technology. These registers consist of eight D-type flip-flops with a
buffered common clock and buffered 3-state output control. When the output
enable (OE) input is low, the eight outputs are enabled. When the
OE
input
is high, the outputs are in the high-impedance state.
Input data meeting the set-up and hold time requirements of the D inputs
is transferred to the Q outputs on the low-to-high transition of the clock input.
FUNCTIONAL BLOCK DIAGRAM
D
0
CP
CP
D
Q
CP
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
OE
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
OCTOBER 2008
DSC-5494/5
© 2006 Integrated Device Technology, Inc.
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