L9733TR datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Analog mixed-signal IC> Drivers and interfaces> L9733TR

L9733TR: DescriptionBUF OR INV BASED PRPHL DRVR, PDSO28, ROHS COMPLIANT, SOP-28; CategoryAnalog mixed-signal IC Drivers and interfaces; File Size507KB，34 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

Download Datasheet Parametric View All

L9733TR Overview

BUF OR INV BASED PRPHL DRVR, PDSO28, ROHS COMPLIANT, SOP-28

L9733TR Parametric

Parameter Name	Attribute value
Maker	STMicroelectronics
Parts packaging code	SOIC
package instruction	SOP,
Contacts	28
Reach Compliance Code	unknown
ECCN code	EAR99
Built-in protection	OVER CURRENT; THERMAL
Interface integrated circuit type	BUFFER OR INVERTER BASED PERIPHERAL DRIVER
JESD-30 code	R-PDSO-G28
length	17.9 mm
Number of functions	1
Number of terminals	28
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output current flow direction	SOURCE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Certification status	Not Qualified
Maximum seat height	2.65 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
Temperature level	AUTOMOTIVE
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Disconnect time	100 µs
connection time	20 µs
width	7.5 mm

L9733TR Preview

L9733

Octal self configuring low/high side driver

Features

■

Eight independently self configuring low/high

drivers

Supply voltage from 4.5 V to 5.5 V

ON(max)

= 0.7

@ T

= 25 °C,

ON(max)

= 1.2

= 125 °C

Minimum current limit of each output 1 A

Output voltage clamping min. 40 V in low-side

configuration

Output voltage clamping max. -14 V in high-side

configuration

SPI interface for outputs control and for

diagnosis data communication

Additional PWM inputs for 3 outputs

Independent thermal shutdown for all outputs

open load, short to GND, short to Vb,

overcurrent diagnostics in latched or unlatched

mode for each channel

Internal charge pump without need of external

capacitor

Controlled SR for reduced EMC

PowerSSO-28

Outputs 1-8 are self-configuring as high or low-

side drives. Self-configuration allows a user to

connect a high or low-side load to any of these

outputs and the L9733 will drive them correctly as

well as provide proper fault mode operation with

no other needed inputs. In addition, outputs 6, 7 and

8 can be PWM controlled via a external pins (IN6-8).

This device is capable of switching variable load

currents over the ambient range of -40 °C to

+125 °C. The outputs are MOSFET drivers to

minimize Vdd current requirements. For low-side

configured outputs an internal zener clamp from

the drain to gate with a breakdown of 50 V

minimum will provide fast turn off of inductive

loads. When a high-side configured output is

commanded Off after having been commanded

On, the source voltage will go to (VGND - 15 V).

An 16 bit SPI input is used to command the 8

output drivers either "On" or "Off", reducing the

I/O port requirement of the microcontroller.

Multiple L9733 can be daisy-chained. In addition

the SPI output indicates latched fault conditions

that may have occurred.

■

Description

The L9733 is a highly flexible monolithic, medium

current, output driver that incorporates 8 outputs

that can be used as either internal low or high-side

drives in any combination.

Table 1.

Device summary

Order code

L9733XP

L9733XPTR

Package

PowerSSO-28 (Exposed pad)

Packing

Tube

Tape and reel

May 2009

Doc ID 11319 Rev 9

1/34

www.st.com

Contents

L9733

Contents

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1

Operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1.1

2.1.2

2.1.3

2.1.4

2.1.5

Functional operative range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Jump start conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Operation at low battery condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Operation at load dump condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Loss of protection against short to battery . . . . . . . . . . . . . . . . . . . . . . . . 9

2.2

2.3

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Electrical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.1

3.2

3.3

DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

SPI characteristics and timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4.1

Configurations for outputs 1-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4.1.1

4.1.2

Low-side drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

High-side drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4.2

4.3

4.4

4.5

Outputs 1-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Outputs 6-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Drn1-8 susceptibility to negative voltage transients . . . . . . . . . . . . . . . . . 19

Supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.5.1

4.5.2

4.5.3

Main power input (Vdd) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Battery supply (Vbat) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Discrete inputs voltage supply (VDO) . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.6

Discrete inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.6.1

4.6.2

Output 6-8 enable input (In6, ln7, ln8) . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Reset input (RES) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

2/34

Doc ID 11319 Rev 9

L9733

Contents

5.1

5.2

5.3

5.4

5.5

5.6

Serial data output (DO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Serial data input (DI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Chip select (CS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Serial clock (SCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Initial input command register and fault register SPI cycle . . . . . . . . . . . . 22

Input command register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Other L9733 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

6.1

6.2

6.3

6.4

Charge pump usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Waveshaping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

POR register initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Fault operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

7.1

Low-side configured output fault operation . . . . . . . . . . . . . . . . . . . . . . . . 25

7.1.1

7.1.2

No latch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Latch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

7.2

High-side configured output fault operation . . . . . . . . . . . . . . . . . . . . . . . 27

7.2.1

7.2.2

No latch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Latch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Doc ID 11319 Rev 9

3/34

List of tables

L9733

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

SPI characteristics and timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Bit command register definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Command register logic definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Fault register definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Fault logic definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

4/34

Doc ID 11319 Rev 9

L9733

List of figures

Figure 1.

Figure 2.

Figure 3.

Figure 4.

Figure 5.

Figure 6.

Figure 7.

Figure 8.

Figure 9.

Figure 10.

Figure 11.

Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Output turn on/off delays and slew rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

DO loading for disable time measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Output loading for slew rate measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

SPI input/output timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

SPI timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

L9733 application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

L9733 HVAC applicative examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

L9733 powertrain applicative examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Optimized circuit layout to achieve proper EMI/ESD capability . . . . . . . . . . . . . . . . . . . . . 31

PowerSSO28 mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . 32

Doc ID 11319 Rev 9

5/34

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