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9DB801CFLF

Description
SSOP-48, Tube
Categorylogic    logic   
File Size248KB,20 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
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9DB801CFLF Overview

SSOP-48, Tube

9DB801CFLF Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeSSOP
package instructionSSOP, SSOP48,.4
Contacts48
Manufacturer packaging codePVG48
Reach Compliance Codecompliant
ECCN codeEAR99
series9DB
Input adjustmentDIFFERENTIAL
JESD-30 codeR-PDSO-G48
JESD-609 codee3
length15.875 mm
Logic integrated circuit typePLL BASED CLOCK DRIVER
Humidity sensitivity level1
Number of functions1
Number of inverted outputs
Number of terminals48
Actual output times8
Maximum operating temperature70 °C
Minimum operating temperature
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Encapsulate equivalent codeSSOP48,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.05 ns
Maximum seat height2.8 mm
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.5 mm
DATASHEET
Eight Output Differential Buffer for PCI Express (50-200MHz)
Description
The 9DB801C is a DB800 Version 2.0 Yellow Cover part with
PCI Express support. It can be used in PC or embedded
systems to provide outputs that have low cycle-to-cycle jitter
(50ps), low output-to-output skew (100ps), and are PCI Express
gen 1 compliant. The 9DB801C supports a 1 to 8 output
configuration, taking a spread or non spread differential HCSL
input from a CK410(B) main clock such as 954101 and
932S401, or any other differential HCSL pair. 9DB801C can
generate HCSL or LVDS outputs from 50 to 200MHz in PLL
mode or 0 to 400Mhz in bypass mode. There are two de-jittering
modes available selectable through the HIGH_BW# input pin,
high bandwidth mode provides de-jittering for spread inputs and
low bandwidth mode provides extra de-jittering for non-spread
inputs. The SRC_STOP#, PD#, and individual OE# real-time
input pins provide completely programmable power
management control.
ICS9DB801C
Features/Benefits
Spread spectrum modulation tolerant, 0 to -0.5% down
spread and +/- 0.25% center spread.
Supports undriven differential outputs in PD# and
SRC_STOP# modes for power management.
Supports polarity inversion to the output enables,
SRC_STOP and PD.
Key Specifications
Outputs cycle-cycle jitter < 50ps
Outputs skew: 50ps
50 - 200MHz operation
Extended frequency range in bypass mode to 400 MHz
PCI Express Gen I compliant
Real time PLL lock detect output pin
48-pin SSOP/TSSOP package
Available in RoHS compliant packaging
Output Features
8 - 0.7V current-mode differential output pairs
Supports zero delay buffer mode and fanout mode
Bandwidth programming available
Funtional Block Diagram
8
OE_(7:0)
SRC_IN
SRC_IN#
SPREAD
COMPATIBLE
PLL
M
U
X
STOP
LOGIC
8
DIF(7:0))
SRC_STOP#
HIGH_BW#
BYPASS#/PLL
PD#
SDATA
SCLK
CONTROL
LOGIC
IREF
LOCK
Note: Polarities shown for OE_INV = 0.
IDT
TM
/ICS
TM
Eight Output Differential Buffer for PCI Express (50-200MHz)
9DB801C
REV E 01/27/11
1

9DB801CFLF Related Products

9DB801CFLF 9DB801CGLF 9DB801CGLFT 9DB801BGLF 9DB801BGLFT 9DB801CFLFT
Description SSOP-48, Tube TSSOP-48, Tube TSSOP-48, Reel TSSOP-48, Tube TSSOP-48, Reel SSOP-48, Reel
Brand Name Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology
Is it lead-free? Lead free Lead free Lead free Lead free Lead free Lead free
Is it Rohs certified? conform to conform to conform to conform to conform to conform to
Parts packaging code SSOP TSSOP TSSOP TSSOP TSSOP SSOP
package instruction SSOP, SSOP48,.4 TSSOP, TSSOP48,.3,20 TSSOP, TSSOP48,.3,20 TSSOP, TSSOP48,.3,20 TSSOP, TSSOP48,.3,20 ROHS COMPLIANT, MO-118, SSOP-48
Contacts 48 48 48 48 48 48
Manufacturer packaging code PVG48 PAG48 PAG48 PAG48 PAG48 PVG48
Reach Compliance Code compliant compliant compliant compliant compliant compliant
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
series 9DB 9DB 9DB 9DB 9DB 9DB
Input adjustment DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL MUX DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL MUX
JESD-30 code R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48
JESD-609 code e3 e3 e3 e3 e3 e3
length 15.875 mm 12.5 mm 12.5 mm 12.5 mm 12.5 mm 15.875 mm
Logic integrated circuit type PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER
Humidity sensitivity level 1 1 1 1 1 1
Number of functions 1 1 1 1 1 1
Number of terminals 48 48 48 48 48 48
Actual output times 8 8 8 8 8 8
Maximum operating temperature 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SSOP TSSOP TSSOP TSSOP TSSOP SSOP
Encapsulate equivalent code SSOP48,.4 TSSOP48,.3,20 TSSOP48,.3,20 TSSOP48,.3,20 TSSOP48,.3,20 SSOP48,.4
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 260 260 260 260 260 260
power supply 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.05 ns 0.05 ns 0.05 ns 0.05 ns 0.05 ns 0.05 ns
Maximum seat height 2.8 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm 2.8 mm
Maximum supply voltage (Vsup) 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V
Minimum supply voltage (Vsup) 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES YES YES
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.635 mm 0.5 mm 0.5 mm 0.5 mm 0.5 mm 0.635 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 7.5 mm 6.1 mm 6.1 mm 6.1 mm 6.1 mm 7.5 mm
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) - - IDT (Integrated Device Technology)
Base Number Matches - 1 1 1 1 -
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