UT54ACS193-PCX datasheet, PDF - EEWORLD Datasheet

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UT54ACS193-PCX: DescriptionBinary Counter, AC Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional, CMOS, CDIP16, SIDE-BRAZED, CERAMIC, DIP-16; Categorylogic logic; File Size102KB，8 Pages; ManufacturerCobham PLC

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UT54ACS193-PCX Overview

Binary Counter, AC Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional, CMOS, CDIP16, SIDE-BRAZED, CERAMIC, DIP-16

UT54ACS193-PCX Parametric

Parameter Name	Attribute value
Maker	Cobham PLC
package instruction	SIDE-BRAZED, CERAMIC, DIP-16
Reach Compliance Code	unknown
Other features	TCO UP AND TCO DOWN OUTPUTS; SEPARATE UP/DOWN CLOCK
Counting direction	BIDIRECTIONAL
series	AC
JESD-30 code	R-CDIP-T16
Load/preset input	YES
Logic integrated circuit type	BINARY COUNTER
Maximum Frequency@Nom-Sup	56000000 Hz
MaximumI(ol)	0.0001 A
Operating mode	SYNCHRONOUS
Number of digits	4
Number of functions	1
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP16,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
propagation delay (tpd)	24 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Trigger type	POSITIVE EDGE
width	7.62 mm

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UT54ACS193/UT54ACTS193

Radiation-Hardened

Synchronous 4-Bit Up-Down Dual Clock Counters

FEATURES

Look-ahead circuitry enhances cascaded counters

Fully synchronous in count modes

Asynchronous clear

radiation-hardened CMOS

- Latchup immune

High speed

Low power consumption

Single 5 volt supply

Available QML Q or V processes

Flexible package

16-pin DIP

DESCRIPTION

The UT54ACS193 and the UT54ACTS193 are synchronous 4-

operation is provided by having all flip-flops clocked

simultaneously so that the outputs change coincident with each

output counting spikes normally associated with asynchronous

counters.

level transition of either count input (Up or Down). The direc-

tion of the counting is determined by which count input is pulsed

PINOUTS

Top View

DOWN

CLR

LOAD

16-Lead Flatpack

DOWN

CLR

LOAD

FUNCTION TABLE

FUNCTION

The counters are fully programmable. The outputs may be pre-

set to either level by placing a low on the load input and entering

agree with the data inputs independently of the count pulses.

Asynchronous loading allows the counters to be used as modu-

preset inputs.

A clear input has been provided that forces all outputs to the low

pendent of the count and the load inputs.

The counter is designed for efficient cascading without the need

BO) produces a low-

Similarly, the carry output (CO

while the count is maximum

CLOCK

DOWN

CLR

LOAD

Count Up

Count Down

Reset

Load Preset

Input

137

RadHard MSI Logic

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