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7026L20JGI

Description
Dual-Port SRAM, 16KX16, 20ns, CMOS, PQCC84, 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, GREEN, PLASTIC, LCC-84
Categorystorage    storage   
File Size679KB,18 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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7026L20JGI Overview

Dual-Port SRAM, 16KX16, 20ns, CMOS, PQCC84, 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, GREEN, PLASTIC, LCC-84

7026L20JGI Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
package instructionQCCJ,
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum access time20 ns
JESD-30 codeS-PQCC-J84
memory density262144 bit
Memory IC TypeDUAL-PORT SRAM
memory width16
Number of functions1
Number of terminals84
word count16384 words
character code16000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize16KX16
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Package shapeSQUARE
Package formCHIP CARRIER
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formJ BEND
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
HIGH-SPEED
16K X 16 DUAL-PORT
STATIC RAM
IDT7026S/L
Features
True Dual-Ported memory cells which allow simultaneous
access of the same memory location
High-speed access
– Commercial: 15/20/25/35/55ns (max.)
– Industrial: 20/25/35/55ns (max.)
– Military: 20/25/35/55ns (max.)
Low-power operation
– IDT7026S
Active: 750mW (typ.)
Standby: 5mW (typ.)
– IDT7026L
Active: 750mW (typ.)
Standby: 1mW (typ.)
Separate upper-byte and lower-byte control for multi-
plexed bus compatibility
IDT7026 easily expands data bus width to 32 bits or more
using the Master/Slave select when cascading more than
one device
M/S = H for
BUSY
output flag on Master,
M/S = L for
BUSY
input on Slave
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling
between ports
Fully asynchronous operation from either port
TTL-compatible, single 5V (±10%) power supply
Available in 84-pin PGA and 84-pin PLCC
Industrial temperature range (-40°C to +85°C) is available
for selected speeds
Green parts available, see ordering information
Functional Block Diagram
R/
W
L
UB
L
R/
W
R
UB
R
LB
L
CE
L
OE
L
LB
R
CE
R
OE
R
I/O
8L
-I/O
15L
I/O
0L
-I/O
7L
BUSY
L
A
13L
A
0L
(1,2)
I/O
Control
I/O
Control
I/O
8R
-I/O
15R
I/O
0R
-I/O
7R
BUSY
R
A
13R
A
0R
(1,2)
Address
Decoder
14
MEMORY
ARRAY
14
Address
Decoder
CE
L
ARBITRATION
SEMAPHORE
LOGIC
CE
R
SEM
L
M/S
NOTES:
1. (MASTER):
BUSY
is output; (SLAVE):
BUSY
is input.
2.
BUSY
outputs are non-tri-stated push-pull.
SEM
R
2939 drw 01
AUGUST 2015
1
DSC 2939/14
©2015 Integrated Device Technology, Inc.

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Description Dual-Port SRAM, 16KX16, 20ns, CMOS, PQCC84, 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, GREEN, PLASTIC, LCC-84 Dual-Port SRAM, 16KX16, 25ns, CMOS, PQCC84, 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-84 Dual-Port SRAM, 16KX16, 55ns, CMOS, PQCC84, 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-84 Dual-Port SRAM, 16KX16, 15ns, CMOS, PQCC84, 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, GREEN, PLASTIC, LCC-84 Dual-Port SRAM, 16KX16, 15ns, CMOS, PQCC84, 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, GREEN, PLASTIC, LCC-84 Dual-Port SRAM, 16KX16, 25ns, CMOS, PQCC84, 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-84 Dual-Port SRAM, 16KX16, 20ns, CMOS, PQCC84, 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-84 Dual-Port SRAM, 16KX16, 20ns, CMOS, PQCC84, 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, GREEN, PLASTIC, LCC-84
package instruction QCCJ, QCCJ, LDCC84,1.2SQ QCCJ, LDCC84,1.2SQ QCCJ, QCCJ, QCCJ, LDCC84,1.2SQ QCCJ, LDCC84,1.2SQ QCCJ,
Reach Compliance Code compliant _compli _compli compliant compliant not_compliant not_compliant compliant
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
Is it Rohs certified? conform to incompatible incompatible conform to - incompatible incompatible -
Maker IDT (Integrated Device Technology) - IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) - IDT (Integrated Device Technology)
Maximum access time 20 ns 25 ns - 15 ns 15 ns - - 20 ns
JESD-30 code S-PQCC-J84 S-PQCC-J84 - S-PQCC-J84 S-PQCC-J84 - - S-PQCC-J84
memory density 262144 bit 262144 bi - 262144 bit 262144 bit - - 262144 bit
Memory IC Type DUAL-PORT SRAM DUAL-PORT SRAM - DUAL-PORT SRAM DUAL-PORT SRAM - - DUAL-PORT SRAM
memory width 16 16 - 16 16 - - 16
Number of functions 1 1 - 1 1 - - 1
Number of terminals 84 84 - 84 84 - - 84
word count 16384 words 16384 words - 16384 words 16384 words - - 16384 words
character code 16000 16000 - 16000 16000 - - 16000
Operating mode ASYNCHRONOUS ASYNCHRONOUS - ASYNCHRONOUS ASYNCHRONOUS - - ASYNCHRONOUS
Maximum operating temperature 85 °C 85 °C - 70 °C 70 °C - - 85 °C
organize 16KX16 16KX16 - 16KX16 16KX16 - - 16KX16
Package body material PLASTIC/EPOXY PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY - - PLASTIC/EPOXY
encapsulated code QCCJ QCCJ - QCCJ QCCJ - - QCCJ
Package shape SQUARE SQUARE - SQUARE SQUARE - - SQUARE
Package form CHIP CARRIER CHIP CARRIER - CHIP CARRIER CHIP CARRIER - - CHIP CARRIER
Parallel/Serial PARALLEL PARALLEL - PARALLEL PARALLEL - - PARALLEL
Maximum supply voltage (Vsup) 5.5 V 5.5 V - 5.5 V 5.5 V - - 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V - 4.5 V 4.5 V - - 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V - 5 V 5 V - - 5 V
surface mount YES YES - YES YES - - YES
technology CMOS CMOS - CMOS CMOS - - CMOS
Temperature level INDUSTRIAL INDUSTRIAL - COMMERCIAL COMMERCIAL - - INDUSTRIAL
Terminal form J BEND J BEND - J BEND J BEND - - J BEND
Terminal location QUAD QUAD - QUAD QUAD - - QUAD
Base Number Matches - 1 1 1 1 1 1 -

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