datasheet
EEWORLDEEWORLDEEWORLD
Datasheet
Part Number

Keyword

Search
Keyword

Part Number

Search
Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> 843N571BKILFT
PDF
Preview

843N571BKILFT

Description
VFQFPN-40, Reel
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size712KB，27 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
Download Datasheet Parametric View All

843N571BKILFT Online Shopping

Suppliers Part Number Price MOQ In stock  
843N571BKILFT - - View Buy Now

843N571BKILFT Overview

VFQFPN-40, Reel

843N571BKILFT Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeVFQFPN
package instructionHVQCCN,
Contacts40
Manufacturer packaging codeNLG40P1
Reach Compliance Codecompliant
ECCN codeEAR99
Samacsys DescriptionVFQFP-N 6.0 X 6.0 X 0.9 MM - NO LEAD
JESD-30 codeS-XQCC-N40
JESD-609 codee3
length6 mm
Humidity sensitivity level3
Number of terminals40
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Maximum output clock frequency156.25 MHz
Package body materialUNSPECIFIED
encapsulated codeHVQCCN
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
Master clock/crystal nominal frequency25 MHz
Maximum seat height1 mm
Maximum supply voltage3.6 V
Minimum supply voltage3 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMATTE TIN
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width6 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER

843N571BKILFT Preview

FemtoClock® NG Clock Synthesizer
843N571I
Datasheet
Description
The 843N571I is a PLL based clock synthesizer for use in Ethernet
applications. The device uses IDT’s fourth generation FemtoClock
®
NG technology for optimal high clock frequency and low phase noise
performance, combined with a low power consumption and high
power supply noise rejection. Using IDT’s latest FemtoClock NG PLL
technology, the 843N571I achieves <0.3ps RMS phase jitter
performance.
843N571I can synthesize 100MHz, 125MHz, 156.25MHz and a low
frequency 33.33MHz CPU clock from a single device. Six LVCMOS
outputs also serve as additional buffering of the 25MHz crystal
reference.
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
Fourth generation FemtoClock
®
Next Generation (NG) technology
Seven single-ended LVCMOS outputs, 30 output impedance
Three LVPECL output pairs
One differential LVPECL (QA, nQA) output pair: 156.25MHz
Two selectable differential LVPECL output pairs (QB, nQB and
QC, nQC): 100MHz and 125MHz
One single-ended LVCMOS (QD0) 33.33MHz CPU clock
Selectable external crystal or single-ended input source
Crystal oscillator interface designed for 25MHz, parallel resonant
crystal
FemtoClock NG frequency multiplier provides low jitter, high
frequency output
FemtoClock NG VCO frequency: 2.5GHz
RMS phase jitter @ 125MHz, using a 25MHz crystal
(12kHz – 20MHz): 0.283ps (typical)
Power supply noise rejection PSNR: -80dB
3.3V supply voltage
-40C to 85C ambient operating temperature
Lead-free (RoHS 6) packaging
Pin Assignment
FORCE_LOW
nc
QREF5
40 39 38 37 36 35 34 33 32 31
V
EE
V
CC
QREF0
QREF1
V
CC
XTAL_IN
XTAL_OUT
REFCLK
REFSEL
V
EE
1
2
3
4
5
6
7
8
9
10
11 12 13 14 15 16 17 18 19 20
V
CC
nQA
QB
nQB
V
CC
V
CC
QA
nc
nc
nc
30
29
QREF3
QREF2
V
CC
FREQSEL
V
CC
V
CC
V
CC
QD0
nQC
QC
QREF4
28
27
26
25
24
23
22
21
V
CC
V
CC
V
CC
ICS843N571I
40-Lead VFQFN
6mm x 6mm x 0.925mm
package body
K Package
Top View
©2018 Integrated Device Technology, Inc
V
EE
V
CC
nc
1
November 29, 2018
843N571I Datasheet
Block Diagram
REFSEL
Pullup
QREF 0
XTAL_IN
25MHz
XTAL_OUT
OSC
QREF 1
1
0
QREF 2
QREF 3
QREF 4
QREF 5
REFCLK
25MHz
Pulldown
PF
+
CP
FemtoClock NG
VCO
÷16
QA
nQA
÷100
÷25
1
0
QB
nQB
FREQSEL
Pullup/Pulldown
3 - State
Decoder
1
QC
nQC
÷20
0
÷75
FORCE_LOW
Pulldown
QD0
©2018 Integrated Device Technology, Inc
2
November 29, 2018
843N571I Datasheet
Pin Description and Pin Characteristic Tables
Table 1. Pin Descriptions
Number
1, 10, 34
Name
V
EE
Power
Type
Description
Negative supply pins.
Power supply pins.
Pins 2, 28, 33 – power supply connection for the 25MHz LVCMOS outputs
Pin 5 – power supply connection for the crystal oscillator
Pins 11, 15, 26, 35 – power supply connection for the dividers and other
core circuitry
Pin 16 (vposO) – power supply connection for the differential LVPECL
outputs
Pin 24, 25 – power supply connection for the 33MHz LVCMOS output
Pin 39 – power supply connection for the digital logic
Pin 40 – power supply connection for the PLL
Single-ended outputs. 3.3V LVCMOS/LVTTL reference levels.
Parallel resonant crystal interface. XTAL_OUT is the output,
XTAL_IN is the input.
Pulldown
Pullup
Single-ended LVCMOS/LVTTL reference clock input.
Reference select pin. When HIGH, selects crystal. When LOW, selects
REFCLK. See Table 3A. LVCMOS/LVTTL interface levels.
No connect.
Output
Output
Output
Output
Input
Input
Pullup/
Pulldown
Pulldown
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Single-ended output. 3.3V LVCMOS/LVTTL reference levels.
Frequency select pin. See Table 3B. LVCMOS/LVTTL interface levels.
Forces the QD0 output into a low state. See Table 3C.
LVCMOS/LVTTL interface levels.
2, 5, 11, 15,
16, 24, 25,
26, 28, 33,
35, 39, 40
V
CC
Power
3, 4,
29, 30,
31, 32
6,
7
8
9
12, 13, 14,
36, 38
17, 18
19, 20
21, 22
23
27
37
QREF0, QREF1,
QREF2, QREF3,
QREF4, QREF5
XTAL_IN,
XTAL_OUT
REFCLK
REFSEL
nc
QA, nQA
QB, nQB
QC, nQC
QD0
FREQSEL
FORCE_LOW
Output
Input
Input
Input
NOTE:
Pullup and Pulldown
refer to internal input resistors. See Table 2,
Pin Characteristics,
for typical values.
Table 2. Pin Characteristics
Symbol
C
IN
C
PD
R
PULLUP
R
PULLDOWN
R
OUT
Parameter
Input Capacitance
Power Dissipation
Capacitance
(per output)
QD0,
QREF[0:5]
Test Conditions
Crystal Not Included
V
CC
= 3.6V
Minimum
Typical
2
6
51
51
30
Maximum
Units
pF
pF
k
k
Input Pullup Resistor
Input Pulldown Resistor
Output
Impedance
QD0,
QREF[0:5]
©2018 Integrated Device Technology, Inc
3
November 29, 2018
843N571I Datasheet
Function Tables
Table 3A. REFSEL Function Table
Inputs
REFSEL
0
1 (default)
REFCLK
XTAL_IN, XTAL_OUT
Input Source
Table 3C. FORCE_LOW Function Table
Inputs
FORCE_LOW
0 (default)
1
Output Frequency (MHz)
QD0
33.33
Disabled
Table 3B. FREQSEL Function Table
Inputs
FREQSEL
0
1
Float (default)
Output Frequency (MHz)
QB, nQB
125
100
125
QC, nQC
125
100
100
©2018 Integrated Device Technology, Inc
4
November 29, 2018
843N571I Datasheet
Absolute Maximum Ratings
Exposure to absolute maximum rating conditions for extended periods may affect product reliability. Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of
product at these conditions or any conditions beyond those listed in the
DC Characteristics or AC Characteristics
is not implied.
Item
Supply Voltage, V
CC
Inputs, V
I
XTAL_IN
Other Inputs
Outputs, I
O
(LVCMOS)
Outputs, I
O
(LVPECL)
Continuous Current
Surge Current
Package Thermal Impedance,
JA
Maximum Junction Temperature, T
J,MAX
Storage Temperature, T
STG
Rating
3.63V
0V to 2V
-0.5V to V
CC
+ 0.5V
-0.5V to V
CC
+ 0.5V
50mA
100mA
37.7C/W (0 mps)
150°C
-65C to 150C
Recommended Operating Conditions
Symbol
T
A
T
J
Parameter
Ambient air temperature
Junction temperature
Minimum
-40
Typical
Maximum
85
125
Units
C
C
NOTE 1: It is the user’s responsibility to ensure that device junction temperature remains below the maximum allowed.
NOTE 2: All conditions in the table must be met to guarantee device functionality.
NOTE 3: The device is verified to the maximum operating junction temperature through simulation.
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics,
V
CC
= 3.3V ± 0.3V, V
EE
= 0V, T
A
= -40°C to 85°C
Symbol
V
CC
I
EE
Parameter
Power Supply Voltage
Power Supply Current
No Load
Test Conditions
Minimum
3.0
Typical
3.3
Maximum
3.6
250
Units
V
mA
Table 4B. LVCMOS/LVTTL DC Characteristics,
V
CC
= 3.3V ± 0.3V, T
A
= -40°C to 85°C
Symbol
V
IH
Parameter
Input High
Voltage
REFSEL,
FORCE_LOW
FREQSEL
REFSEL,
FORCE_LOW
FREQSEL
FREQSEL
V
CC
/2 - 0.1
Test Conditions
Minimum
2
V
CC
- 0.4
-0.3
0.8
0.4
V
CC
/2 + 0.1
Typical
Maximum
V
CC
+ 0.3
Units
V
V
V
V
V
V
IL
Input Low
Voltage
Input
Medium
Voltage
V
IM
©2018 Integrated Device Technology, Inc
5
November 29, 2018
More (Only the first 5 pages are displayed. Please Download Datasheet to view the full content.) >

Recommended Resources

Things you don’t know about high-frequency transformers and EMI

48v to 12v circuit diagram

Given voltage and speed negative feedback circuit

M7475 vertical axis rotary table surface grinder magnetic chuck demagnetization circuit (6)

Phase pulse type phase failure protector circuit

875p computer motherboard circuit diagram_067

How do you determine the phase of voltage and current?
How do you determine the phase of voltage and current?Output sine wave 0-50V, maximum output current within 25mA, output power 1.5W. Voltage signal VF0, current signal IF0, when VF0 and IF0 are in pha...
QWE4562009 Discrete Device
STC microcontroller RAM expansion problem - urgent!
I use STC12LE5A60S2 microcontroller, which has 60K ROM and 1280 RAM. However, since I am making a communication processing software, there are many intermediate variables involved. Therefore, I have t...
moseslin Embedded System
Can four 16-bit DDR3 chips be designed using a 6-layer PCB?
I would like to ask, if 4*16bit DDR3, front and back mounting layout, using 6-layer PCB design, what should the reasonable stacking structure be? Is there any risk in 6 layers? Thank you....
elec32156 PCB Design
Expert help, kernel customization problem
I would like to ask if I download a customized image to SDRAM, will it be lost when the power is off, and will it return to the original system before the download after restart? Please help me. Thank...
qigan Embedded System
CC2530 and CC2592 detailed introduction
This application report describes pairing the cost-effective SimpleLink ZigBee CC2530 wireless networking MCU with the SimpleLink CC2592 extender to improve receiver sensitivity, increase the total li...
乐乐熊 TI Technology Forum
My stream driver keeps having problems.
我的串口总是提示DLL_THREAD_DETACH如下： MID = 0xec, DID = 0x76 4th Cycle : 0xa5 NUMBLOCKS : 512(0x200), SECTORSPERBLOCK = 256(0x100), BYTESPERSECTOR = 512(0x200)[color=#FF0000]STRINGS: **********DLL_PROCESS_ATTA...
nuanshuiping Embedded System
Shortcut:   S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components

  1. R025S-3312-H-R
  2. 94619-116H
  3. MS403-W5AC-CW
  4. 232279362675L
  5. BZM27/A1012/63C.D
  6. BD095-28H-F0-0200-0070-0570-LG
  7. LPAU-121PA-D/Q
  8. FP-U8999-12-1262-A-T-2
  9. 15KPJ24
  10. BZX55B18-35B
  11. UF2010_R2_10001
  12. TR2010B8062P

Popular Articles

  1. Is there also a “chain of contempt” in the car manufacturing industry?
  2. Introduction to related terms of partial discharge detector
  3. PLC uses pulse mode to control servo motor
  4. What are the characteristics and advantages of radar level meter
  5. Elevator Control System Based on 51 Single Chip Microcomputer
  6. Samsung resumes One UI 4.0 official version push for Galaxy S21/Z Flod3 and others
  7. A detailed explanation of thermal resistance thermal transient tester
  8. AVR Interrupt Detailed Explanation
  9. How to calibrate an oscilloscope? Oscilloscope probe calibration square wave
  10. Jump-start product development with NXP application software packages

Technical ResourceMore

  1. atmega328 pin diagram
  2. Essential Knowledge for Electrical and Electronic Engineers (3rd Edition)
  3. USB mouse program based on Cypress CY3655 development tool
  4. Courseware - Application of Saber Simulation in Switching Power Supply Product Design
  5. YDT 1171-2001 IP Network Technical Requirements - Network Performance Parameters and Indicators
  6. Fundamentals of Automotive Electrical and Electronic Technology
  7. A Concise Python 3 Tutorial
  8. Python Development Practice
  9. Autonomous robot manufacturing
  10. BP-2C Busbar Protection Instructions

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

About Us Customer Service Contact Information Datasheet Sitemap LatestNews
Index Files: 1090  347  2473  756  1063  22  7  50  16  12 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号