LP324J datasheet, PDF - EEWORLD Datasheet

LP324J: DescriptionQUAD OP-AMP, 4000uV OFFSET-MAX, 0.1MHz BAND WIDTH, CDIP14, CERAMIC, DIP-14; CategoryAnalog mixed-signal IC Amplifier circuit; File Size887KB，13 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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LP324J Overview

QUAD OP-AMP, 4000uV OFFSET-MAX, 0.1MHz BAND WIDTH, CDIP14, CERAMIC, DIP-14

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Texas Instruments
Parts packaging code	DIP
package instruction	DIP, DIP14,.3
Contacts	14
Reach Compliance Code	unknown
ECCN code	EAR99
Amplifier type	OPERATIONAL AMPLIFIER
Architecture	VOLTAGE-FEEDBACK
Maximum average bias current (IIB)	0.01 µA
Maximum bias current (IIB) at 25C	0.01 µA
Minimum Common Mode Rejection Ratio	80 dB
Nominal Common Mode Rejection Ratio	90 dB
frequency compensation	YES
Maximum input offset voltage	4000 µV
JESD-30 code	R-GDIP-T14
JESD-609 code	e0
length	19.43 mm
low-dissonance	NO
micropower	YES
Negative supply voltage upper limit	-16 V
Number of functions	4
Number of terminals	14
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5/30 V
Certification status	Not Qualified
Maximum seat height	5.08 mm
Nominal slew rate	0.05 V/us
Maximum slew rate	0.15 mA
Supply voltage upper limit	16 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	BIPOLAR
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Nominal Uniform Gain Bandwidth	100 kHz
Minimum voltage gain	50000
width	7.62 mm

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