SST89E54RC-40-I-NJE datasheet, PDF

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SST89E54RC-40-I-NJE: DescriptionMicrocontroller, 8-Bit, FLASH, 40MHz, CMOS, PQCC44, ROHS COMPLIANT, PLASTIC, MS-018AC, LCC-44; CategoryThe embedded processor and controller Microcontrollers and processors; File Size113KB，9 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

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SST89E54RC-40-I-NJE Overview

Microcontroller, 8-Bit, FLASH, 40MHz, CMOS, PQCC44, ROHS COMPLIANT, PLASTIC, MS-018AC, LCC-44

SST89E54RC-40-I-NJE Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Parts packaging code	LPCC
package instruction	QCCJ,
Contacts	44
Reach Compliance Code	unknown
ECCN code	3A991.A.2
Has ADC	NO
Address bus width	16
bit size	8
maximum clock frequency	40 MHz
DAC channel	NO
DMA channel	NO
External data bus width	8
JESD-30 code	S-PQCC-J44
JESD-609 code	e3
length	16.5354 mm
Number of I/O lines	32
Number of terminals	44
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	NO
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
ROM programmability	FLASH
Maximum seat height	4.572 mm
speed	40 MHz
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	16.5354 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

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FlashFlex51 MCU

SST89E51RC / SST89E52RC / SST89E54RC

SST89V51RC / SST89V52RC / SST89V54RC

SST89E/VE5xRC FlashFlex51 MCU

Preliminary Specifications

FEATURES:

• 8-bit 8051-Compatible Microcontroller (MCU)

with Embedded SuperFlash Memory

– Fully Software Compatible

– Development Toolset Compatible

– Pin-for-Pin Package Compatible

• SST89E5xRC Operation

– 0 to 40 MHz at 5V

• SST89V5xRC Operation

– 0 to 33 MHz at 3V

• Total 512 Byte Internal RAM

(256 Byte by default +

256 Byte enabled by software)

• Single Block SuperFlash EEPROM

– SST89E/V54RC: 16 KByte primary partition +

1 KByte secondary partition

– SST89E/V52RC: 8 KByte primary partition +

1 KByte secondary partition

– SST89E/V51RC: 4 KByte primary partition +

1 KByte secondary partition

– Primary Partition is divided into Four Pages

– Secondary Partition has One Page

– Individual Page Security Lock

– In-System Programming (ISP)

– In-Application Programming (IAP)

– Small-Sector Architecture: 128-Byte Sector Size

• Support External Address Range up to 64

KByte of Program and Data Memory

• Three High-Current Port 1 pins (16 mA each)

• Three 16-bit Timers/Counters

• Full-Duplex, Enhanced UART

– Framing error detection

– Automatic address recognition

• Eight Interrupt Sources at 4 Priority Levels

• Programmable Watchdog Timer (WDT)

• Programmable Counter Array (PCA)

• Four 8-bit I/O Ports (32 I/O Pins)

• Second DPTR register

• Low EMI Mode (Inhibit ALE)

• SPI Serial Interface

• Standard 12 Clocks per cycle, the device has an

option to double the speed to 6 clocks per cycle.

• TTL- and CMOS-Compatible Logic Levels

• Low Power Modes

– Power-down Mode with External Interrupt Wake-up

– Idle Mode

• Selectable Operation Clock

– Divide down to 1/4, 1/16, 1/256, or 1/1024th

• Temperature Ranges:

– Commercial (0°C to +70°C)

– Industrial (-40°C to +85°C)

• Packages Available

– 44-lead PLCC

– 44-lead TQFP

• All non-Pb (lead-free) devices are RoHS compliant

PRODUCT DESCRIPTION

The SST89E/V54RC, SST89E/V52RC, and SST89E/

V51RC are members of the FlashFlex51 family of 8-bit

microcontroller products designed and manufactured with

SST’s patented and proprietary SuperFlash CMOS semi-

conductor process technology. The split-gate cell design

and thick-oxide tunneling injector offer significant cost and

reliability benefits for our customers.The devices use the

8051 instruction set and are pin-for-pin compatible with stan-

dard 8051 microcontroller devices.

The device comes with 17/9/5 KByte of on-chip flash

EEPROM program memory which is divided into 2 inde-

pendent program memory partitions. The primary partition

occupies 16/8/4 KByte of internal program memory space

and the secondary partition occupies 1 KByte of internal

program memory space.

The flash memory can be programmed via a standard

87C5x OTP EPROM programmer fitted with a special

adapter and firmware for SST’s devices. During power-on

S71259(01)-00-000

2/05

reset, the devices can be configured as either a slave to an

external host for source code storage or a master to an

external host for an in-system programming (ISP) opera-

tion. The devices are designed to be programmed in-sys-

tem on the printed circuit board for maximum flexibility. The

device is pre-programmed with an example of the boot-

strap loader in memory, demonstrating the initial user pro-

gram code loading or subsequent user code updating via

an ISP operation. A sample bootstrap loader is available for

the user’s reference and convenience only; SST does not

guarantee its functionality or usefulness. Chip-Erase opera-

tions will erase the pre-programmed sample code.

In addition to 17/9/5 KByte of SuperFlash EEPROM pro-

gram memory on-chip, the device can address up to 64

KByte of external program memory. In addition to 512 x8

bits of on-chip RAM, up to 64 KByte of external RAM can

be addressed.

The SST logo, SuperFlash, and FlashFlex are registered trademarks of Silicon Storage Technology, Inc.

These specifications are subject to change without notice.

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