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MT5C2568DJ-20AT

Description
Standard SRAM, 32KX8, 20ns, CMOS, PDSO28
Categorystorage    storage   
File Size113KB,12 Pages
ManufacturerMicron Technology
Websitehttp://www.mdtic.com.tw/
Download Datasheet Parametric View All

MT5C2568DJ-20AT Overview

Standard SRAM, 32KX8, 20ns, CMOS, PDSO28

MT5C2568DJ-20AT Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMicron Technology
Reach Compliance Codenot_compliant
Maximum access time20 ns
I/O typeCOMMON
JESD-30 codeR-PDSO-J28
JESD-609 codee0
memory density262144 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of terminals28
word count32768 words
character code32000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
organize32KX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSOJ
Encapsulate equivalent codeSOJ28,.34
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
power supply5 V
Certification statusNot Qualified
Maximum standby current0.007 A
Minimum standby current4.5 V
Maximum slew rate0.165 mA
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationDUAL
OBSOLETE 3/1/95
MT5C2568
32K x 8 SRAM
SRAM
FEATURES
• High speed: 10, 12, 15, 20 and 25
• High-performance, low-power, CMOS double-metal
process
• Single +5V
±10%
power supply
• Easy memory expansion with
/
C
/
E and
/
O
/
E options
• All inputs and outputs are TTL-compatible
32K x 8 SRAM
PIN ASSIGNMENT (Top View)
28-Pin DIP
(SA-4)
A14
A12
A7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
WE
A13
A8
A9
A11
OE
A10
CE
DQ8
DQ7
DQ6
DQ5
DQ4
28-Pin SOJ
(SD-2)
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ1
DQ2
DQ3
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
WE
A13
A8
A9
A11
OE
A10
CE
DQ8
DQ7
DQ6
DQ5
DQ4
OPTIONS
• Timing
10ns access
12ns access
15ns access
20ns access
25ns access
• Packages
Plastic DIP (300 mil)
Plastic SOJ (300 mil)
• 2V data retention (optional)
• Low power (optional)
MARKING
-10
-12
-15
-20
-25
None
DJ
L
P
None
IT
AT
XT
A6
A5
A4
A3
A2
A1
A0
DQ1
DQ2
DQ3
Vss
• Temperature
Commercial (0°C to +70°C)
Industrial
(-40°C to +85°C)
Automotive (-40°C to +125°C)
Extended
(-55°C to +125°C)
• Part Number Example: MT5C2568DJ-20 L
NOTE: Not all combinations of operating temperature, speed, data retention
and low power are necessarily available. Please contact the factory for availabil-
ity of specific part number combinations.
GENERAL DESCRIPTION
The MT5C2568 is organized as a 32,768 x 8 SRAM using
a four-transistor memory cell with a high-speed, low-power
CMOS process. Micron SRAMs are fabricated using double-
layer metal, double-layer polysilicon technology.
For flexibility in high-speed memory applications,
Micron offers chip enable (/C
/
E) and output enable (?O
/
E) with
this organization. These enhancements can place the out-
puts in High-Z for additional flexibility in system design.
Writing to these devices is accomplished when write
enable (?W
/
E) and
/
C
/
E inputs are both LOW. Reading is
accomplished when
?
W
/
E remains HIGH and
/
C
/
E and
?
O
/
E go
LOW. The device offers a reduced power standby mode
MT5C2568
Rev. 2/95
when disabled. This allows system designers to meet low
standby power requirements.
The “P” version provides a reduction in both operating
current (I
CC
) and TTL standby current (I
SB
1
). The latter is
achieved through the use of gated inputs on the
?
W
/
E,
?
O
/
E and
address lines, which also facilitates the design of battery
backed systems. That is, the gated inputs simplify the
design effort and circuitry required to protect against inad-
vertent battery current drain during power-down, when
inputs may be at undefined levels.
All devices operate from a single +5V power supply and
all inputs and outputs are fully TTL-compatible.
1
Micron Semiconductor, Inc., reserves the right to change products or specifications without notice.
©1995,
Micron Semiconductor, Inc.
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