EEWORLDEEWORLDEEWORLD

Part Number

Search

54SHST163LL

Description
Binary Counter, HST/T Series, Synchronous, Positive Edge Triggered, 4-Bit, Up Direction, CMOS, CQCC20
Categorylogic    logic   
File Size2MB,84 Pages
ManufacturerDynex
Websitehttp://www.dynexsemi.com/
Download Datasheet Parametric View All

54SHST163LL Overview

Binary Counter, HST/T Series, Synchronous, Positive Edge Triggered, 4-Bit, Up Direction, CMOS, CQCC20

54SHST163LL Parametric

Parameter NameAttribute value
MakerDynex
package instruction,
Reach Compliance Codeunknown
Other featuresTCO OUTPUT
Counting directionUP
seriesHST/T
JESD-30 codeS-CQCC-N20
Load/preset inputYES
Logic integrated circuit typeBINARY COUNTER
Operating modeSYNCHRONOUS
Number of digits4
Number of functions1
Number of terminals20
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialCERAMIC, METAL-SEALED COFIRED
Package shapeSQUARE
Package formCHIP CARRIER
propagation delay (tpd)22 ns
Certification statusNot Qualified
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal formNO LEAD
Terminal locationQUAD
Trigger typePOSITIVE EDGE
FPGA Design of RS232 Transmitter Module (Paper, Code)
RS-232 Transmitter Module It should work like this: The transmitter receives 8 bits of data and outputs it serially. ("TxD_start" is set to start transmission). When there is data transmission, the "b...
程序天使 FPGA/CPLD
PSPICE Entry-Level Tutorial
PSPICE Entry-Level Tutorial...
安_然 Microchip MCU
Show the WEBENCH design process + output 9 voltage 1.2A current fast charging power adapter solution
[i=s] This post was last edited by Playground on 2014-7-24 23:58 [/i] [size=5][font=宋体]Recently, Xiaomi released the Mi 4. This steel plate is not simple! It is indeed a little bit complicated. Apart ...
游乐场 Analogue and Mixed Signal
How do you calculate the current gain of this circuit?
How is this Io formula calculated? Doesn't the load need to be considered?...
幸福ing Analog electronics
FPGA Simulation Problems
When QUARTUS calls MODELSIM to simulate, why does the number at the bottom of the status bar increase by 2 when I click it for RTL simulation? It seems to be a single-step simulation? It may be caused...
870027359 FPGA/CPLD
Why does the LED not go out?
The 24V here is the sensor signal. When there is a signal, the LED will light up. But why is the LED still slightly bright when the 24V is completely disconnected? Is it because of static electricity?...
sky999 PCB Design

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 480  2066  1362  2382  2817  10  42  28  48  57 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号