HD74HC373, HD74HC533
Octal D-type Transparent Latches (with 3-state outputs)
Octal D-type Transparent Latches (with inverted 3-state outputs)
REJ03D0619-0300
Rev.3.00
Mar 25, 2009
Description
When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of
HD74HC533 will follow the inversion of the D inputs. When the latch enable goes low, data at the D inputs will be
retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control
input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of
the storage elements.
Features
•
•
•
•
•
•
High Speed Operation: t
pd
(D to Q) = 16 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1
µA
max
Low Quiescent Supply Current: I
CC
(static) = 4
µA
max (Ta = 25°C)
Ordering Information
Part Name
HD74HC373P
HD74HC533P
HD74HC373FPEL
HD74HC533FPEL
HD74HC373RPEL
HD74HC533RPEL
HD74HC373TELL
Note:
Package Type
DILP-20 pin
SOP-20 pin (JEITA)
SOP-20 pin (JEDEC)
TSSOP-20 pin
Package Code
(Previous Code)
PRDP0020AC-B
(DP-20NEV)
PRSP0020DD-B
(FP-20DAV)
PRSP0020DC-A
(FP-20DBV)
PTSP0020JB-A
(TTP-20DAV)
Package
Abbreviation
P
FP
RP
T
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
EL (1,000 pcs/reel)
ELL (2,000 pcs/reel)
Please consult the sales office for the above package availability.
Function Table
Output Control
L
L
L
H
Note:
Enable G
H
H
L
X
D
H
L
X
X
HD74HC373
Q
H
L
No change
Z
HD74HC533
Q
L
H
No change
Z
1. H; High level, L; Low level, X; Irrelevant, Z; High impedance
REJ03D0619-0300 Rev.3.00 Mar 25, 2009
Page 1 of 9
HD74HC373, HD74HC533
Logic Diagram
HD74HC373
1D
D
G
Q
Enable G
2D
D
G
Q
3D
D
G
Q
4D
D
G
Q
5D
D
G
Q
6D
D
G
Q
7D
D
G
Q
8D
D
G
Q
Output
Control
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
HD74HC533
1D
D
G
Q
Enable G
2D
D
G
Q
3D
D
G
Q
4D
D
G
Q
5D
D
G
Q
6D
D
G
Q
7D
D
G
Q
8D
D
G
Q
Output
Control
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
Absolute Maximum Ratings
Item
Supply voltage range
Input / Output voltage
Input / Output diode current
Output current
V
CC
, GND current
Power dissipation
Storage temperature
Note:
Symbol
V
CC
V
IN
, V
OUT
I
IK
, I
OK
I
OUT
I
CC
or I
GND
P
T
Tstg
Ratings
–0.5 to 7.0
–0.5 to V
CC
+0.5
±20
±35
±75
500
–65 to +150
Unit
V
V
mA
mA
mA
mW
°C
The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
REJ03D0619-0300 Rev.3.00 Mar 25, 2009
Page 3 of 9
HD74HC373, HD74HC533
Recommended Operating Conditions
Item
Supply voltage
Input / Output voltage
Operating temperature
Input rise / fall time
Note:
*1
Symbol
V
CC
V
IN
, V
OUT
Ta
t
r
, t
f
Ratings
2 to 6
0 to V
CC
–40 to 85
0 to 1000
0 to 500
0 to 400
Unit
V
V
°C
ns
Conditions
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
Electrical Characteristics
Item
Symbol V
CC
(V)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
Off-state output
current
Input current
Quiescent supply
current
I
OZ
Iin
I
CC
6.0
6.0
6.0
Ta = 25°C
Min
Typ Max
1.5
—
—
3.15
—
—
4.2
—
—
—
1.9
4.4
5.9
4.18
5.68
—
—
—
—
—
—
—
—
—
—
—
—
2.0
4.5
6.0
—
—
0.0
0.0
0.0
—
—
—
—
—
—
0.5
1.35
1.8
—
—
—
—
—
0.1
0.1
0.1
0.26
0.26
±0.5
±0.1
4.0
Ta = –40 to+85°C
Unit
Min
Max
1.5
—
V
3.15
—
4.2
—
—
—
1.9
4.4
5.9
4.13
5.63
—
—
—
—
—
—
—
—
—
0.5
1.35
1.8
—
—
—
—
—
0.1
0.1
0.1
0.33
0.33
±5.0
±1.0
40
µA
Test Conditions
V
IH
Input voltage
V
IL
V
I
OH
= –20
µA
V
Vin = V
IH
or V
IL
I
OH
= –6 mA
I
OH
= –7.8 mA
I
OL
= 20
µA
V
Vin = V
IH
or V
IL
I
OH
= 6 mA
I
OH
= 7.8 mA
Vin = V
IH
or V
IL
,
Vout = V
CC
or GND
µA
Vin = V
CC
or GND
µA
Vin = V
CC
or GND, Iout = 0
µA
V
OH
Output voltage
V
OL
REJ03D0619-0300 Rev.3.00 Mar 25, 2009
Page 4 of 9
HD74HC373, HD74HC533
Switching Characteristics
(C
L
= 50 pF, Input t
r
= t
f
= 6 ns)
Item
Symbol V
CC
(V)
t
PLH
t
PHL
t
PLH
t
PHL
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
—
Ta = 25°C
Min
Typ
—
—
150
—
18
30
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
100
20
17
50
10
9
80
16
14
—
—
—
—
—
—
16
—
—
12
—
—
15
—
—
13
—
—
16
—
—
1
—
—
1
—
—
6
—
—
4
—
5
26
125
25
21
150
30
26
150
30
26
150
30
26
150
30
26
—
—
—
—
—
—
—
—
—
60
12
10
10
Ta = –40 to +85°C
Unit
Test Conditions
Max
—
190
ns G to Q
—
38
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
125
25
21
65
13
11
100
20
17
—
—
—
—
33
155
31
26
190
38
33
190
38
33
190
38
33
190
38
33
—
—
—
—
—
—
—
—
—
75
15
13
10
Propagation delay
time
ns
D to Q
t
ZL
Output enable
time
t
ZH
ns
ns
t
LZ
Output disable
time
t
HZ
ns
ns
Setup time
t
su
ns
Hold time
t
h
ns
Pulse width
t
w
ns
Output rise/fall
time
Input capacitance
t
TLH
t
THL
Cin
ns
pF
Test Circuit
V
CC
V
CC
Output
See Function Table
Input
Pulse Generator
Z
out
= 50
Ω
Input
Pulse Generator
Z
out
= 50
Ω
OC
1Q to 8Q
or
1Q to 8Q
1 k
Ω
C
L
=
50 pF
S1
OPEN
GND
V
CC
1D to 8D
TEST
t
PLH
/ t
PHL
t
ZH
/ t
HZ
t
ZL
/ t
LZ
S1
OPEN
GND
V
CC
Enable G
Note : 1. C
L
includes probe and jig capacitance.
REJ03D0619-0300 Rev.3.00 Mar 25, 2009
Page 5 of 9