54F412LM datasheet, PDF - EEWORLD Datasheet

54F412LM: DescriptionIC F/FAST SERIES, 8-BIT DRIVER, TRUE OUTPUT, CQCC28, CERAMIC, LCC-28, Bus Driver/Transceiver; Categorylogic logic; File Size257KB，5 Pages; ManufacturerNational Semiconductor（TI ）; Websitehttp://www.ti.com

Stay tuned Parametric

54F412LM Overview

IC F/FAST SERIES, 8-BIT DRIVER, TRUE OUTPUT, CQCC28, CERAMIC, LCC-28, Bus Driver/Transceiver

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	National Semiconductor（TI ）
package instruction	QCCN, LCC(UNSPEC)
Reach Compliance Code	unknown
Other features	WITH STATUS FLIP-FLOP FOR INTERRUPT COMMANDS; WITH CLEAR
series	F/FAST
JESD-30 code	S-CQCC-N28
JESD-609 code	e0
length	11.43 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUS DRIVER
MaximumI(ol)	0.02 A
Number of digits	8
Number of functions	1
Number of ports	2
Number of terminals	28
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QCCN
Encapsulate equivalent code	LCC(UNSPEC)
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Maximum supply current (ICC)	60 mA
Prop。Delay @ Nom-Sup	23 ns
propagation delay (tpd)	19 ns
Certification status	Not Qualified
Maximum seat height	1.93 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	TTL
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	11.43 mm

Can anyone who is an expert in VHDL please tell me what is wrong with the following program? How can I modify it?: ---------------hugonglibrary IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity test_yunsuan isPort ( CLK: inSTD_LOGIC;disvaluein: inSTD_LOGIC_VEC...; 黄德志 FPGA/CPLD

Nothing is impossible, only imagination can make it happen - Variety of White Paper: ...; lixiaohai8211 Talking

Shenzhen Tengyuanda Technology urgently recruits CCD board R&D design engineers: Urgent recruitment: Shenzhen Tengyuanda Technology Co., Ltd. is now expanding production and needs to recruit three CCD board R&D and design engineers with more than three years of experience. Salary ...; 曾丽红 Recruitment

ISP1581 High-Speed USB Interface Device: ISP1581 is a low-cost, powerful, high-speed universal serial bus (USB) interface device. It fully complies with the USB 2.0 specification and provides high-speed USB communication capabilities for sys...; rain Analog electronics

Line inversion detection of matrix keyboard: Usually, I write matrix keyboard codes by using the traditional line-by-line detection method. I will post a line reversal method to make progress together. I think this method is quite novel. Haha...; 江汉大学南瓜 Microcontroller MCU

Detailed explanation of FPGA digital tube dynamic scanning attachment: [b][font=宋体]Dynamic scanning of digital tubes[/font][/b][align=left] [/align][b][font=宋体]1. Project background[/font][/b][align=left]LED digital tubes (LED Segment Displays[font=宋体]) are devices that ...; guyu_1 FPGA/CPLD

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components