LMU17GMB75 datasheet, PDF - EEWORLD Datasheet

LMU17GMB75: DescriptionMultiplier, 16-Bit, CMOS, CPGA68, CAVITY-DOWN, CERAMIC, PGA-68; CategoryThe embedded processor and controller Microcontrollers and processors; File Size267KB，8 Pages; ManufacturerLOGIC Devices; Websitehttp://www.logicdevices.com/

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LMU17GMB75 Overview

Multiplier, 16-Bit, CMOS, CPGA68, CAVITY-DOWN, CERAMIC, PGA-68

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	LOGIC Devices
Parts packaging code	PGA
package instruction	PGA, PGA68,11X11
Contacts	68
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Other features	2 X 16 BIT DATA INPUT BUS; ICC SPECIFIED @ 5MHZ
boundary scan	NO
maximum clock frequency	13.33 MHz
External data bus width	16
JESD-30 code	S-CPGA-P68
JESD-609 code	e0
length	29.464 mm
low power mode	NO
Humidity sensitivity level	3
Number of terminals	68
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output data bus width	32
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Encapsulate equivalent code	PGA68,11X11
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	225
power supply	5 V
Certification status	Not Qualified
Filter level	38535Q/M;38534H;883B
Maximum seat height	3.81 mm
Maximum slew rate	25 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
Maximum time at peak reflow temperature	NOT SPECIFIED
width	29.464 mm
uPs/uCs/peripheral integrated circuit type	DSP PERIPHERAL, MULTIPLIER

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