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FEATURES
Meets EIA RS-485 Standard
5 Mbps Data Rate
Single 5 V Supply
–7 V to +12 V Bus Common-Mode Range
High Speed, Low Power BiCMOS
Thermal Shutdown Protection
Short-Circuit Protection
Driver Propagation Delay: 10 ns
Receiver Propagation Delay: 15 ns
High Z Outputs with Power Off
Superior Upgrade for LTC485
APPLICATIONS
Low Power RS-485 Systems
DTE-DCE Interface
Packet Switching
Local Area Networks
Data Concentration
Data Multiplexers
Integrated Services Digital Network (ISDN)
RO
5 V Low Power
EIA RS-485 Transceiver
ADM485
FUNCTIONAL BLOCK DIAGRAM
ADM485
R
V
CC
RE
B
DE
A
DI
D
GND
GENERAL DESCRIPTION
The ADM485 is a differential line transceiver suitable for high
speed bidirectional data communication on multipoint bus trans-
mission lines. It is designed for balanced data transmission and
complies with EIA Standards RS-485 and RS-422. The part
contains a differential line driver and a differential line receiver.
Both the driver and the receiver may be enabled independently.
When disabled, the outputs are three-stated.
The ADM485 operates from a single 5 V power supply. Excessive
power dissipation caused by bus contention or by output shorting
is prevented by a thermal shutdown circuit. This feature forces
the driver output into a high impedance state if during fault condi-
tions a significant temperature increase is detected in the internal
driver circuitry.
Up to 32 transceivers may be connected simultaneously on a bus,
but only one driver should be enabled at any time. It is important,
therefore, that the remaining disabled drivers do not load the bus.
To ensure this, the ADM485 driver features high output imped-
ance when disabled and when powered down.
This minimizes the loading effect when the transceiver is not being
used. The high impedance driver output is maintained over the
entire common-mode voltage range from –7 V to +12 V.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The ADM485 is fabricated on BiCMOS, an advanced mixed
technology process combining low power CMOS with fast switching
bipolar technology. All inputs and outputs contain protection
against ESD; all driver outputs feature high source and sink current
capability. An epitaxial layer is used to guard against latch-up.
The ADM485 features extremely fast switching speeds. Minimal
driver propagation delays permit transmission at data rates up to
5 Mbps while low skew minimizes EMI interference.
The part is fully specified over the commercial and industrial
temperature range and is available in PDIP, SOIC, and small
footprint MSOP packages.
REV. E
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2003 Analog Devices, Inc. All rights reserved.
ADM485–SPECIFICATIONS
Parameter
DRIVER
Differential Output Voltage, V
OD
V
OD3
∆|V
OD
| for Complementary Output States
Common-Mode Output Voltage, V
OC
∆|V
OD
| for Complementary Output States
Output Short-Circuit Current (V
OUT
= High)
Output Short-Circuit Current (V
OUT
= Low)
CMOS Input Logic Threshold Low, V
INL
CMOS Input Logic Threshold High, V
INH
Logic Input Current (DE, DI)
RECEIVER
Differential Input Threshold Voltage, V
TH
Input Voltage Hysteresis,
∆V
TH
Input Resistance
Input Current (A, B)
CMOS Input Logic Threshold Low, V
INL
CMOS Input Logic Threshold High, V
INH
Logic Enable Input Current (RE)
CMOS Output Voltage Low, V
OL
CMOS Output Voltage High, V
OH
Short-Circuit Output Current
Three-State Output Leakage Current
POWER SUPPLY CURRENT
I
CC
(Outputs Enabled)
I
CC
(Outputs Disabled)
Specifications subject to change without notice.
(V
CC
= 5 V
Typ
5%. All specifications T
MIN
to T
MAX
, unless otherwise noted.)
Max
5.0
5.0
5.0
5.0
0.2
3
0.2
250
250
0.8
±
1.0
Unit
V
V
V
V
V
V
V
mA
mA
V
V
µA
V
mV
kΩ
mA
mA
V
V
µA
V
V
mA
µA
mA
mA
Test Conditions/Comments
R =
∞,
Test Circuit 1
V
CC
= 5 V, R = 50
Ω
(RS-422), Test Circuit 1
R = 27
Ω
(RS-485), Test Circuit 1
V
TST
= –7 V to +12 V, Test Circuit 2
R = 27
Ω
or 50
Ω,
Test Circuit 1
R = 27
Ω
or 50
Ω,
Test Circuit 1
R = 27
Ω
or 50
Ω
–7 V
≤
V
O
≤
+12 V
–7 V
≤
V
O
≤
+12 V
Min
2.0
1.5
1.5
35
35
2.0
–0.2
70
12
+0.2
1
–0.8
0.8
2.0
±
1
0.4
4.0
7
85
±
1.0
1.0
0.6
2.2
1
–7 V
≤
V
CM
≤
+12 V
V
CM
= 0 V
–7 V
≤
V
CM
≤
+12 V
V
IN
= 12 V
V
IN
= –7 V
I
OUT
= +4.0 mA
I
OUT
= –4.0 mA
V
OUT
= GND or V
CC
0.4 V
≤
V
OUT
≤
2.4 V
Digital Inputs = GND or V
CC
Digital Inputs = GND or V
CC
TIMING SPECIFICATIONS
Parameter
(V
CC
= 5 V
5%. All specifications T
MIN
to T
MAX
, unless otherwise noted.)
Min
2
Typ
10
1
8
10
10
0
0
Max Unit
15
5
15
25
25
2
2
ns
ns
ns
ns
ns
ns
ns
Test Conditions/Comments
R
LDIFF
= 54
Ω,
C
L1
= C
L2
= 100 pF, Test Circuit 3
R
LDIFF
= 54
Ω,
C
L1
= C
L2
= 100 pF, Test Circuit 3
R
LDIFF
= 54
Ω,
C
L1
= C
L2
= 100 pF, Test Circuit 3
R
L
= 110
Ω,
C
L
= 50 pF, Test Circuit 4
R
L
= 110
Ω,
C
L
= 50 pF, Test Circuit 4
R
L
= 110
Ω,
C
L
= 50 pF, Test Circuit 4*
R
L
= 110
Ω,
C
L
= 50 pF, Test Circuit 4*
DRIVER
Propagation Delay Input to Output t
PLH
, t
PHL
Driver O/P to
O/P,
t
SKEW
Driver Rise/Fall Time, t
R
, t
F
Driver Enable to Output Valid
Driver Disable Timing
Matched Enable Switching
|t
AZH
– t
BZL
|, |t
BZH
– t
AZL
|
Matched Disable Switching
|t
AHZ
– t
BLZ
|, |t
BHZ
– t
ALZ
|
RECEIVER
Propagation Delay Input to Output, t
PLH
, t
PHL
Skew |t
PLH
– t
PHL
|
Receiver Enable, t
EN1
Receiver Disable, t
EN2
Tx Pulse Width Distortion
Rx Pulse Width Distortion
*Guaranteed
by characterization.
Specifications subject to change without notice.
8
15
5
5
1
1
30
5
20
20
ns
ns
ns
ns
ns
ns
C
L
= 15 pF, Test Circuit 5
C
L
= 15 pF, Test Circuit 5
C
L
= 15 pF, R
L
= 1 kΩ, Test Circuit 6
C
L
= 15 pF, R
L
= 1 kΩ, Test Circuit 6
–2–
REV. E
ADM485
ABSOLUTE MAXIMUM RATINGS*
(T
A
= 25°C, unless otherwise noted.)
Table I. Transmitting
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Inputs
Driver Input (DI) . . . . . . . . . . . . . . . . –0.3 V to V
CC
+ 0.3 V
Control Inputs (DE,
RE)
. . . . . . . . . . –0.3 V to V
CC
+ 0.3 V
Receiver Inputs (A, B) . . . . . . . . . . . . . . . . . . –9 V to +14 V
Outputs
Driver Outputs (A, B) . . . . . . . . . . . . . . . . . . –9 V to +14 V
Receiver Output . . . . . . . . . . . . . . . . . –0.5 V to V
CC
+ 0.5 V
Power Dissipation 8-Lead MSOP . . . . . . . . . . . . . . . . 900 mW
θ
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 206°C/W
Power Dissipation 8-Lead PDIP . . . . . . . . . . . . . . . . . 500 mW
θ
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 130°C/W
Power Dissipation 8-Lead SOIC . . . . . . . . . . . . . . . . . 450 mW
θ
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 170°C/W
Operating Temperature Range
Commercial (J Version) . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Industrial (A Version) . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*Stresses
above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum ratings
for extended periods of time may affect device reliability.
Inputs
DE
1
1
0
DI
1
0
X
Outputs
B
0
1
Z
A
1
0
Z
Table II. Receiving
RE
0
0
0
1
Inputs
A–B
≥
+0.2 V
≤
–0.2 V
Output
RO
1
0
1
Z
Inputs Open
X
ORDERING GUIDE
Model
ADM485AN
ADM485AR
ADM485AR-REEL
ADM485ARZ*
ADM485ARZ-REEL*
ADM485ARM
ADM485ARM-REEL
ADM485ARM-REEL7
ADM485JN
ADM485JR
ADM485JR-REEL
ADM485JR-REEL7
ADM485JRZ*
ADM485JRZ-REEL*
ADM485JRZ-REEL7*
*Z
= Lead Free.
Temperature Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
Package Option
N-8
R-8
R-8
R-8
R-8
RM-8
RM-8
RM-8
N-8
R-8
R-8
R-8
R-8
R-8
R-8
Branding
M41
M41
M41
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADM485 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
REV. E
–3–
ADM485
PIN CONFIGURATION
RO
1
RE
2
8
V
CC
ADM485
7
B
TOP VIEW
DE
3
(Not to Scale)
6
A
DI
4
5
GND
PIN FUNCTION DESCRIPTIONS
Pin No. Mnemonic
1
2
3
4
5
6
7
8
RO
RE
DE
DI
GND
A
B
V
CC
Function
Receiver Output. When enabled, if A > B by 200 mV, then RO = High. If A < B by 200 mV, then
RO = Low.
Receiver Output Enable. A low level enables the receiver output, RO. A high level places it in a high
impedance state.
Driver Output Enable. A high level enables the driver differential outputs, A and B. A low level places it in a
high impedance state.
Driver Input. When the driver is enabled, a Logic Low on DI forces A low and B high while a Logic High
on DI forces A high and B low.
Ground Connection, 0 V.
Noninverting Receiver Input A/Driver Output A.
Inverting Receiver Input B/Driver Output B.
Power Supply, 5 V
±
5%.
–4–
REV. E