CY2310BNZPVI-1 datasheet, PDF - EEWORLD Datasheet

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CY2310BNZPVI-1: DescriptionLow Skew Clock Driver, 2310 Series, 10 True Output(s), 0 Inverted Output(s), PDSO28, 5.30 MM, SSOP-28; Categorylogic logic; File Size78KB，8 Pages; ManufacturerCypress Semiconductor

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CY2310BNZPVI-1 Overview

Low Skew Clock Driver, 2310 Series, 10 True Output(s), 0 Inverted Output(s), PDSO28, 5.30 MM, SSOP-28

CY2310BNZPVI-1 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Cypress Semiconductor
Parts packaging code	SSOP
package instruction	5.30 MM, SSOP-28
Contacts	28
Reach Compliance Code	not_compliant
series	2310
Input adjustment	STANDARD
JESD-30 code	R-PDSO-G28
JESD-609 code	e0
length	10.2 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
MaximumI(ol)	0.001 A
Number of functions	1
Number of inverted outputs
Number of terminals	28
Actual output times	10
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Encapsulate equivalent code	SSOP28,.3
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Prop。Delay @ Nom-Sup	5 ns
propagation delay (tpd)	5 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.2 ns
Maximum seat height	2 mm
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	5.3 mm
minfmax	133 MHz

CY2310BNZPVI-1 Preview

0NZCY2310

10BNZ

CY2310BNZ

3.3V SDRAM Buffer for Mobile PCs

with 4 SO-DIMMs

Features

• One input to 10 output buffer/driver

• Supports up to four SDRAM SO-DIMMs

• Two additional outputs for feedback

• SMBus interface for output control

• Low skew outputs

• Up to 100 MHz operation

• Multiple V

and V

pins for noise reduction

• Dedicated OE pin for testing

• Space-saving 28-pin SSOP package

• 3.3V operation

Functional Description

The CY2310BNZ is a 3.3V buffer designed to distribute

high-speed clocks in mobile PC applications. The part has 10

outputs, 8 of which can be used to drive up to four SDRAM

SO-DIMMs, and the remaining can be used for external feed-

back to a PLL. The device operates at 3.3V and outputs can

run up to 100 MHz, thus making it compatible with Pentium II®

processors. The CY2310BNZ can be used in conjunction with

the CY2281 or similar clock synthesizer for a full Pentium II

motherboard solution.

The CY2310BNZ also includes an SMBus interface which can

enable or disable each output clock. On power-up, all output

clocks are enabled. A separate Output Enable pin facilitates

testing on ATE.

Block Diagram

Pin Configuration

28-pin SSOP

Top View

SDRAM0

SDRAM1

SDRAM2

SDRAM3

SMBus

Decoding

SDRAM4

SDRAM5

SDRAM6

SDRAM7

SDRAM8

SDRAM9

SDRAM0

SDRAM1

SDRAM2

SDRAM3

BUF_IN

SDRAM8

DDIIC

SDATA

BUF_IN

SDATA

SCLOCK

SDRAM7

SDRAM6

SDRAM5

SDRAM4

SDRAM9

SSIIC

SCLOCK

Intel and Pentium II are registered trademarks of Intel Corporation.

Cypress Semiconductor Corporation

Document #: 38-07260 Rev. **

•

3901 North First Street

•

San Jose

•

CA 95134 • 408-943-2600

Revised September 27, 2001

CY2310BNZ

Pin Summary

Name

DDIIC

SSIIC

BUF_IN

SDATA

SCLK

SDRAM [0–3]

SDRAM [4–7]

SDRAM [8–9]

Pins

1, 5, 10, 19, 24, 28

4, 8, 12, 17, 21, 25

2, 3, 6, 7

22, 23, 26, 27

11, 18

Description

3.3V Digital voltage supply

Ground

SMBus Voltage supply

Ground for SMBus

Input clock

Output Enable, three-states outputs when LOW. Internal pull-up to V

SMBus data input, internal pull-up to V

SMBus clock input, internal pull-up to V

SDRAM byte 0 clock outputs

SDRAM byte 1 clock outputs

SDRAM byte 2 clock outputs

Device Functionality

SDRAM [0–17]

High-Z

1 x BUF_IN

Serial Configuration Map

• The Serial bits will be read by the clock driver in the following

order:

Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0

Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0

Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0

• Reserved and unused bits should be programmed to “0”.

• SMBus Address for the CY2310BNZ is:

Byte 1: SDRAM Active/Inactive Register

(1 = Active, 0 = Inactive), Default = Active

Bit

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

R/W

----

Bit 1

Bit 0

Pin #

Description

SDRAM7 (Active/Inactive)

SDRAM6 (Active/Inactive)

SDRAM5 (Active/Inactive)

SDRAM4 (Active/Inactive)

Initialize to 0

Byte 0:SDRAM Active/Inactive Register

(1 = Enable, 0 = Disable), Default = Enabled

Bit

Pin #

Initialize to 0

SDRAM3 (Active/Inactive)

SDRAM2 (Active/Inactive)

SDRAM1 (Active/Inactive)

SDRAM0 (Active/Inactive)

Description

Byte 2: SDRAM Active/Inactive Register

(1 = Active, 0 = Inactive), Default = Active

Bit

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Pin #

Description

SDRAM9 (Active/Inactive)

SDRAM8 (Active/Inactive)

Reserved, drive to 0

Bit 7 --

Bit 6 --

Bit 5 --

Bit 4 --

Bit 3 7

Bit 2 6

Bit 1 3

Bit 0 2

Document #: 38-07260 Rev. **

Page 2 of 8

CY2310BNZ

Maximum Ratings

Supply Voltage to Ground Potential ............... –0.5V to +7.0V

DC Input Voltage (Except BUF_IN)........–0.5V to V

+ 0.5V

DC Input Voltage (BUF_IN)............................ –0.5V to +7.0V

Storage Temperature ................................. –65

C to +150

Static Discharge Voltage

(per MIL-STD-883, Method 3015) ............................. >2000V

Ambient Temperature under BIAS.............. –55

C to +125

Operating Conditions

Parameter

Supply Voltage

Operating Temperature (Ambient Temperature)

Load Capacitance

Input Capacitance

Description

Min.

3.135

–40

Max.

3.465

Unit

Document #: 38-07260 Rev. **

Page 3 of 8

CY2310BNZ

Absolute Maximum Ratings

Stresses greater than those listed in this table may cause per-

manent damage to the device. These represent a stress rating

only. Operation of the device at these or any other conditions

Parameter

, V

STG

Description

Voltage on any Pin with Respect to GND

Storage Temperature

Operating Temperature

Ambient Temperature under Bias

above those specified in the operating sections of this specifi-

cation is not implied. Maximum conditions for extended peri-

ods may affect reliability.

Rating

–0.5 to +7.0

–65 to +150

0 to +70

–55 to +125

Unit

°C

DC Electrical Characteristics:

= -40°C to +85°C, V

= 3.3V±5%

Parameter

DD Tristate

Logic Inputs

ILEAK

OUT

Input Low Voltage

Input High Voltage

Input Leakage Current, BUF_IN

Input Leakage Current

[1]

Output Low Voltage

Output High Voltage

Output Low Current

Output High Current

Input Pin Capacitance

Output Pin Capacitance

Input Pin Inductance

= 1 mA

= –1 mA

= 1.5V

3.1

110

100

185

160

–0.3

2.0

–5

–20

0.8

+0.5

µA

Description

3.3V Supply Current

3.3V Supply Current in

Three-State

Test Condition/Comments

at 64MHz

at 100 MHz

Min.

100

150

Typ.

140

185

Max.

180

220

Unit

Logic Outputs (SDRAM0:9)

[2]

Pin Capacitance/Inductance

Notes:

1. OE, SDATA, and SCLOCK logic pins have a 250-k

Ω

internal pull-up resistor (V

– 0.8V).

2. All SDRAM outputs loaded by 6" transmission lines with 22-pF capacitors on ends.

Document #: 38-07260 Rev. **

Page 4 of 8

CY2310BNZ

AC Electrical Characteristics:

= -40°C to +85°C, V

= 3.3V±5% (Lump Capacitance Test Load = 30 pF)

Parameter

DIS

Description

Input Frequency

Output Rise Edge Rate

Output Fall Edge Rate

Output Skew, Rising Edges

Output Skew, Falling Edges

Output Enable Time

Output Disable Time

Rising Edge Propagation Delay

Falling Edge Propagation Delay

Duty Cycle

AC Output Impedance

Measured at 1.5V

1.0

3.0

3.85

Test Condition

at 64 MHz

Measured from 0.4V to 2.4V

Measured from 2.4V to 0.4V

Min.

1.5

Typ.

Max.

133

4.0

200

8.0

5.0

Unit

MHz

V/ns

Ω

Test Circuit

0.1

OUTPUTS

CLK out

LOAD

GND

Document #: 38-07260 Rev. **

Page 5 of 8

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