1GB, 2GB Registered DIMM
SDRAM
SDRAM Registered Module
168pin Registered Module based on 512Mb D-die
54 TSOP-II with Pb-Free
(RoHS compliant)
INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,
AND IS SUBJECT TO CHANGE WITHOUT NOTICE.
NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,
TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL
INFORMATION IN THIS DOCUMENT IS PROVIDED
ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.
1. For updates or additional information about Samsung products, contact your nearest Samsung office.
2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar
applications where Product failure could result in loss of life or personal or physical harm, or any military or
defense application, or any governmental procurement to which special terms or provisions may apply.
* Samsung Electronics reserves the right to change products or specification without notice.
Rev. 1.0 November 2005
1GB, 2GB Registered DIMM
Table of Contents
SDRAM
1.0 Ordering Information ....................................................................................................................2
2.0 Operating Frequencies .................................................................................................................2
3.0 Feature ...........................................................................................................................................2
4.0 Pin Configuration (Front side/back side) ..................................................................................3
5.0 Pin Description ..............................................................................................................................3
6.0 Pin Configuration Description .....................................................................................................4
7.0 Functional Block Diagram ...........................................................................................................5
7.1 1GB, 128M x 72 ECC Module (M390S2953DU1)
..................................................................................5
7.2 1GB, 128M x 72 ECC Module (M390S2950DU1)
..................................................................................6
7.3 1GB, 128M x 72 ECC Module (M390S2950DUU)
.................................................................................7
7.4 2GB, 256M x 72 ECC Module (M390S5658DU1)
.................................................................................8
7.5 2GB, 256M x 72 ECC Module (M390S5658DUU)
..................................................................................9
8.0 Standard Timing Diagram With Pll & Register (Cl=2, Bl=4) ....................................................10
9.0 Absolute Maximum Ratings .......................................................................................................11
10.0 DC Operating Conditions And Characteristics ..................................................................... 11
11.0 Capacitance(Max.) ....................................................................................................................11
12.0 DC Characteristics ....................................................................................................................12
12.1 M390S2953DU1 (128M x72, 1GB Module)
.....................................................................................12
12.2 M390S2950DU(U)1 (128M x 72, 1GB Module)
................................................................................12
12.3 M390S5658DTU(1) (256M x 72, 2GB Module)
................................................................................13
13.0 AC Operating Test Conditions .................................................................................................14
14.0 OPERATING AC PARAMETER ................................................................................................14
15.0 AC Characteristics ....................................................................................................................15
16.0 SIMPLIFIED TRUTH TABLE .....................................................................................................16
17.0 Physical Dimensions ................................................................................................................17
17.1 128Mx72 (M390S2953DU1)
........................................................................................................17
17.2 128Mx72 (M390L2950DU1)
....................................................................................................... 18
17.3 128Mx72 (M390S2950DUU)
........................................................................................................19
17.4 256Mx72 (M390S5658DU1)
........................................................................................................20
17.5 256Mx72 (M390S5658DUU)
........................................................................................................21
Rev. 1.0 November 2005
1GB, 2GB Registered DIMM
168Pin Registered DIMM based on 512Mb D-die (x4, x8)
1.0 Ordering Information
Part Number
M390S2953DU1-C7A
M390S2950DU1-C7A
M390S2950DUU-C7A
M390S5658DU1-C7A
M390S5658DUU-C7A
Density
1GB
1GB
1GB
2GB
2GB
Organization
128Mx72
128Mx72
128Mx72
256Mx72
256Mx72
Component Composition
64Mx8(K4S510832D) * 18EA
128Mx4(K4S510432D) * 18EA
128Mx4(K4S510432D) * 18EA
st.256Mx4(K4S1G0632D) * 18EA
st.256Mx4(K4S1G0632D) * 18EA
Component
Package
54-TSOPII
54-TSOPI
54-TSOPII
54-TSOPII
54-TSOPII
SDRAM
Height
1,700mil
1,700mil
1,200mil
1,700mil
1,200mil
2.0 Operating Frequencies
7A
Speed @CL3
Maximum Clock Frequency
CL-tRCD-tRP
133MHz(10ns)
3-3-3
Speed @CL2
100MHz(10ns)
2-2-2
3.0 Feature
•
•
•
•
•
Burst mode operation
Auto & self refresh capability (8192 Cycles/64ms)
LVTTL compatible inputs and outputs
Single 3.3V
±
0.3V power supply
MRS cycle with address key programs Latency (Access from column address)
Burst length (1, 2, 4, 8)
Data scramble (Sequential & Interleave)
All inputs are sampled at the positive going edge of the system clock
Serial presence detect with EEPROM
54pin TSOP II
Pb-Free
package
RoHS compliant
•
•
•
•
Rev. 1.0 November 2005