SUPPLEMENT
Am29F200A Known Good Die
2 Megabit (256 K x 8-Bit/128 K x 16-Bit)
CMOS 5.0 Volt-only, Sectored Flash Memory—Die Revision 1
DISTINCTIVE CHARACTERISTICS
s
5.0 V
±
10% for read and write operations
— Minimizes system level power requirements
s
High performance
— 90 or 120 ns access time
s
Low power consumption
— 20 mA typical active read current (byte mode)
— 28 mA typical active read current for
(word mode)
— 30 mA typical program/erase current
— 1
µA
typical standby current
s
Sector erase architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
three 64 Kbyte sectors (byte mode)
— One 8 Kword, two 4 Kword, one 16 Kword, and
three 32 Kword sectors (word mode)
— Supports full chip erase
— Sector Protection features:
A hardware method of locking a sector to
prevent any program or erase operations within
that sector
Sectors can be locked via programming
equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
s
Top or bottom boot block configurations
available
s
Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
— Embedded Program algorithm automatically
writes and verifies data at specified addresses
s
Minimum 100,000 write/erase cycles guaranteed
s
Compatible with JEDEC standards
— Pinout and software compatible with
single-power-supply flash
— Superior inadvertent write protection
s
Data# Polling and Toggle Bit
— Detects program or erase cycle completion
s
Ready/Busy# output (RY/BY#)
— Hardware method for detection of program or
erase cycle completion
s
Erase Suspend/Resume
— Supports reading data from a sector not being
erased
s
Hardware RESET# pin
— Resets internal state machine to the reading
array data
s
Tested to datasheet specifications at
temperature
s
Quality and reliability levels equivalent to
standard packaged components
1/13/98
Publication#
21257
Rev:
B
Amendment/0
Issue Date:
December 1997
S U P P L E M E N T
GENERAL DESCRIPTION
The Am29F200A in Known Good Die (KGD) form is a
2 Mbit, 5.0 Volt-only Flash memory. AMD defines KGD
as standard product in die form, tested for functionality
and speed. AMD KGD products have the same reli-
ability and quality as AMD products in packaged form.
Am29F200A Features
The Am29F200A is organized as 262,144 bytes of 8
bits each or 131,072 words of 16 bits each. The 8-bit
data appears on DQ0-DQ7; the 16-bit data appears on
DQ0-DQ15. This device is designed to be programmed
in-system with the standard system 5.0 Volt V
CC
sup-
ply. A 12.0 volt V
PP
is not required for program or erase
operations.
The standard Am29F200A in KGD form offers an ac-
cess time of 90 or 120 ns, allowing high-speed micro-
processors to operate without wait states. To eliminate
bus contention the device has separate chip enable
(CE#), write enable (WE#), and output enable (OE#)
controls.
The device requires only a
single 5.0 volt power sup-
ply
for both read and write functions. Internally gener-
ated and regulated voltages are provided for the
program and erase operations.
The device is entirely command set compatible with the
JEDEC single-power-supply Flash standard.
Com-
mands are written to the command register using stan-
dard microprocessor write timings. Register contents
serve as input to an internal state-machine that con-
trols the erase and programming circuitry. Write cycles
also internally latch addresses and data needed for the
programming and erase operations. Reading data out
of the device is similar to reading from other Flash or
EPROM devices.
Device programming occurs by executing the program
command sequence. This initiates the
Embedded
Program
algorithm—an internal algorithm that auto-
matically times the program pulse widths and verifies
proper cell margin.
Device erasure occurs by executing the erase com-
mand sequence. This initiates the
Embedded Erase
algorithm—an internal algorithm that automatically
preprograms the array ( if it is not already pro-
grammed) before executing the erase operation. Dur-
ing erase, the device automatically times the erase
pulse widths and verifies proper cell margin.
The host system can detect whether a program or
erase operation is complete by observing the RY/BY#
pin, or by reading the DQ7 (Data# Polling) and DQ6/
DQ2 (toggle)
status bits.
After a program or erase
cycle has been completed, the device is ready to read
array data or accept another command.
The
sector erase architecture
allows memory sectors
to be erased and reprogrammed without affecting the
data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection
measures include a low
V
CC
detector that automatically inhibits write opera-
tions during power transitions. The
hardware sector
protection
feature disables both program and erase
operations in any combination of the sectors of mem-
ory. This can be achieved via programming equipment.
The
Erase Suspend
feature enables the user to put
erase on hold for any period of time to read data from,
or program data to, any sector that is not selected for
erasure. True background erase can thus be achieved.
The
hardware RESET# pin
terminates any operation
in progress and resets the internal state machine to
reading array data. The RESET# pin may be tied to the
system reset circuitry. A system reset would thus also
reset the device, enabling the system microprocessor
to read the boot-up firmware from the Flash memory.
The system can place the device into the
standby mode.
Power consumption is greatly reduced in this mode.
AMD’s Flash technology combines years of Flash mem-
ory manufacturing experience to produce the highest lev-
els of quality, reliability and cost effectiveness. The device
electrically erases all bits within a sector simulta-
neously via Fowler-Nordheim tunneling. The data is
programmed using hot electron injection.
ELECTRICAL SPECIFICATIONS
Refer to the Am29F200A data sheet, publication
number 20380, for full electrical specifications on the
Am29F200A.
PRODUCT SELECTOR GUIDE
Family Part Number
Speed Option (V
CC
= 5.0 V
±
10%)
Max access time, ns (t
ACC
)
Max CE# access time, ns (t
CE
)
Max OE# access time, ns (t
OE
)
-90
90
90
35
Am29F200A KGD
-120
120
120
50
2
Am29F200A Known Good Die
1/13/98
S U P P L E M E N T
ORDERING INFORMATION
Standard Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is
formed by a combination of the following:
Am29F200A
T
-90
DP
C
1
DIE REVISION
This number refers to the specific AMD manufacturing
process and product technology reflected in this
document. It is entered in the revision field of AMD
standard product nomenclature.
TEMPERATURE RANGE
C = Commercial (0°C to +70°C)
I = Industrial (–40°C to +85°C)
E = Extended (–55°C to +125°C)
PACKAGE TYPE AND
MINIMUM ORDER QUANTITY
DP = Waffle Pack
245 die per 5 tray stack
DG =
DT =
DW =
Gel-Pak
®
Die Tray
486 die per 6 tray stack
Surftape™ (Tape and Reel)
2500 per 7-inch reel
Gel-Pak
®
Wafer Tray (sawn wafer on frame)
Call AMD sales office for minimum order
quantity
SPEED OPTION
See Valid Combinations
BOOT CODE SECTOR ARCHITECTURE
T = Top sector
B = Bottom sector
DEVICE NUMBER/DESCRIPTION
Am29F200A Known Good Die
2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS Flash Memory—Die Revision 1
5.0 Volt-only Read, Program, and Erase
Valid Combinations
Am29F200AT-90,
Am29F200AB-90
Am29F200AT-120,
Am29F200AB-120
DPC 1, DPI 1, DPE 1,
DGC 1, DGI 1, DGE 1,
DTC 1, DTI 1, DTE 1,
DWC 1, DWI 1, DWE 1
Valid Combinations
Valid Combinations list configurations planned to be sup-
ported in volume for this device. Consult the local AMD sales
office to confirm availability of specific valid combinations and
to check on newly released combinations.
1/13/98
Am29F200A Known Good Die
5
Embedded System
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