ICL7652JG datasheet, PDF - EEWORLD Datasheet

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ICL7652JG: DescriptionOP-AMP, 7.25uV OFFSET-MAX, 1.9MHz BAND WIDTH, CDIP8, CERAMIC, DIP-8; CategoryAnalog mixed-signal IC Amplifier circuit; File Size3MB，16 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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ICL7652JG Overview

OP-AMP, 7.25uV OFFSET-MAX, 1.9MHz BAND WIDTH, CDIP8, CERAMIC, DIP-8

ICL7652JG Parametric

Parameter Name	Attribute value
Maker	Texas Instruments
Parts packaging code	DIP
package instruction	DIP,
Contacts	8
Reach Compliance Code	unknown
ECCN code	EAR99
Amplifier type	OPERATIONAL AMPLIFIER
Maximum average bias current (IIB)	0.0001 µA
Nominal Common Mode Rejection Ratio	140 dB
Maximum input offset voltage	7.25 µV
JESD-30 code	R-GDIP-T8
length	9.58 mm
Negative supply voltage upper limit	-8 V
Nominal Negative Supply Voltage (Vsup)	-5 V
Number of functions	1
Number of terminals	8
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Certification status	Not Qualified
Maximum seat height	5.08 mm
Nominal slew rate	2.8 V/us
Supply voltage upper limit	8 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Nominal Uniform Gain Bandwidth	1900 kHz
width	7.62 mm

ICL7652JG Related Products

	ICL7652JG	ICL7652DR	ICL7652D
Description	OP-AMP, 7.25uV OFFSET-MAX, 1.9MHz BAND WIDTH, CDIP8, CERAMIC, DIP-8	OP-AMP, 7.25uV OFFSET-MAX, 1.9MHz BAND WIDTH, PDSO8, SOP-8	OP-AMP, 7.25uV OFFSET-MAX, 1.9MHz BAND WIDTH, PDSO8, SOP-8
Parts packaging code	DIP	SOIC	SOIC
package instruction	DIP,	SOP-8	SOP-8
Contacts	8	8	8
Reach Compliance Code	unknown	unknown	unknown
ECCN code	EAR99	EAR99	EAR99
Amplifier type	OPERATIONAL AMPLIFIER	OPERATIONAL AMPLIFIER	OPERATIONAL AMPLIFIER
Maximum average bias current (IIB)	0.0001 µA	0.0001 µA	0.0001 µA
Nominal Common Mode Rejection Ratio	140 dB	140 dB	140 dB
Maximum input offset voltage	7.25 µV	7.25 µV	7.25 µV
JESD-30 code	R-GDIP-T8	R-PDSO-G8	R-PDSO-G8
length	9.58 mm	4.9 mm	4.9 mm
Negative supply voltage upper limit	-8 V	-8 V	-8 V
Nominal Negative Supply Voltage (Vsup)	-5 V	-5 V	-5 V
Number of functions	1	1	1
Number of terminals	8	8	8
Maximum operating temperature	70 °C	70 °C	70 °C
Package body material	CERAMIC, GLASS-SEALED	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	SOP	SOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	SMALL OUTLINE	SMALL OUTLINE
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	5.08 mm	1.75 mm	1.75 mm
Nominal slew rate	2.8 V/us	2.8 V/us	2.8 V/us
Supply voltage upper limit	8 V	8 V	8 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V
surface mount	NO	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	THROUGH-HOLE	GULL WING	GULL WING
Terminal pitch	2.54 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL
Nominal Uniform Gain Bandwidth	1900 kHz	1900 kHz	1900 kHz
width	7.62 mm	3.9 mm	3.9 mm
Base Number Matches	-	1	1

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