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K4G323222M-PC50

Description
Synchronous Graphics RAM, 1MX32, 4.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, QFP-100
Categorystorage    storage   
File Size1MB,48 Pages
ManufacturerSAMSUNG
Websitehttp://www.samsung.com/Products/Semiconductor/
Download Datasheet Parametric View All

K4G323222M-PC50 Overview

Synchronous Graphics RAM, 1MX32, 4.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, QFP-100

K4G323222M-PC50 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSAMSUNG
Parts packaging codeQFP
package instructionQFP, QFP100,.7X.9
Contacts100
Reach Compliance Codecompliant
ECCN codeEAR99
access modeDUAL BANK PAGE BURST
Maximum access time4.5 ns
Other featuresAUTO/SELF REFRESH
Maximum clock frequency (fCLK)200 MHz
I/O typeCOMMON
interleaved burst length4,8
JESD-30 codeR-PQFP-G100
JESD-609 codee0
length20 mm
memory density33554432 bit
Memory IC TypeSYNCHRONOUS GRAPHICS RAM
memory width32
Number of functions1
Number of ports1
Number of terminals100
word count1048576 words
character code1000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize1MX32
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeQFP
Encapsulate equivalent codeQFP100,.7X.9
Package shapeRECTANGULAR
Package formFLATPACK
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3 V
Certification statusNot Qualified
refresh cycle2048
Maximum seat height3 mm
self refreshYES
Continuous burst length1,2,4,8,FP
Maximum standby current0.002 A
Maximum slew rate0.29 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width14 mm
K4G323222M
512K x 32Bit x 2 Banks Synchronous Graphic RAM
FEATURES
3.3V power supply
LVTTL compatible with multiplexed address
Dual bank operation
MRS cycle with address key programs
-. CAS Latency (2, 3)
-. Burst Length (1, 2, 4, 8 & full page)
-. Burst Type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the
system clock
Burst Read Single-bit Write operation
DQM 0-3 for byte masking
Auto & self refresh
32ms refresh period (2K cycle)
100 Pin PQFP, TQFP (14 x 20 mm)
CMOS SGRAM
GENERAL DESCRIPTION
The K4G323222M is 33,554,432 bits synchronous high data
rate Dynamic RAM organized as 2 x 524,288 words by 32 bits,
fabricated with SAMSUNG′s high performance CMOS technol-
ogy. Synchronous design allows precise cycle control with the
use of system clock. I/O transactions are possible on every
clock cycle. Range of operating frequencies, programmable
burst length, and programmable latencies allows the same
device to be useful for a variety of high bandwidth, high perfor-
mance memory system applications.
Write per bit and 8 columns block write improves performance in
graphics systems.
ORDERING INFORMATION
Part NO.
K4G323222M-PC/L45
K4G323222M-PC/L50
K4G323222M-PC/L55
K4G323222M-PC/L60
K4G323222M-PC/L70
K4G323222M-PC/L80
K4G323222M-QC/L45
K4G323222M-QC/L50
K4G323222M-QC/L55
K4G323222M-QC/L60
K4G323222M-QC/L70
K4G323222M-QC/L80
Max Freq.
222MHz
200MHz
183MHz
166MHz
143MHz
125MHz
222MHz
200MHz
183MHz
166MHz
143MHz
125MHz
INPUT BUFFER
Interface
Package
Graphics Features
• SMRS cycle.
-. Load mask register
-. Load color register
• Write Per Bit(Old Mask)
• Block Write(8 Columns)
LVTTL
100 PQFP
LVTTL
100 TQFP
FUNCTIONAL BLOCK DIAGRAM
DQMi
BLOCK
WRITE
CONTROL
LOGIC
CLK
CKE
CS
MASK
WRITE
MASK
REGISTER
COLOR
REGISTER
CONTROL
LOGIC
MUX
COLUMN
MASK
DQMi
DQi
(i=0~31)
TIMING REGISTER
SENSE
AMPLIFIER
RAS
CAS
WE
DSF
DQMi
512Kx32
CELL
ARRAY
512Kx32
CELL
ARRAY
ROW DECORDER
BANK SELECTION
SERIAL
COUNTER
COLUMN ADDRESS
BUFFER
ROW ADDRESS
BUFFER
REFRESH
COUNTER
* Samsung Electronics reserves the right to
change products or specification without
CLOCK ADDRESS(A
0
~A
10
,BA)
notice.
ADDRESS REGISTER
OUTPUT BUFFER
LATENCY &
BURST LENGTH
PROGRAMING
REGISTER
COLUMN
DECORDER
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