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PUMA68F32006A-90E

Description
Flash Module, 1MX32, 90ns, PQMA68, PLASTIC, LCC-68
Categorystorage    storage   
File Size182KB,23 Pages
ManufacturerAPTA Group Inc
Download Datasheet Parametric View All

PUMA68F32006A-90E Overview

Flash Module, 1MX32, 90ns, PQMA68, PLASTIC, LCC-68

PUMA68F32006A-90E Parametric

Parameter NameAttribute value
Parts packaging codeQMA
package instructionPLASTIC, LCC-68
Contacts68
Reach Compliance Codeunknow
ECCN code3A991.B.1.A
Maximum access time90 ns
Other featuresCAN ALSO BE CONFIGURED AS 4M X 8
Spare memory width16
JESD-30 codeS-PQMA-S68
memory density33554432 bi
Memory IC TypeFLASH MODULE
memory width32
Number of functions1
Number of terminals68
word count1048576 words
character code1000000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize1MX32
Package body materialPLASTIC/EPOXY
Package shapeSQUARE
Package formMICROELECTRONIC ASSEMBLY
Parallel/SerialPARALLEL
Programming voltage5 V
Certification statusNot Qualified
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formS BEND
Terminal locationQUAD
typeNOR TYPE
Base Number Matches1
1M x 32 FLASH MODULE
PUMA 68F32006/A-90/12/15
11403 West Bernado Court, Suite 100, San Diego, CA 92127.
Tel No: (619) 674 2233, Fax No: (619) 674 2230
Issue 4.2 : December 1999
A version 'A' with four independant write enables
(WE1-4) is available.
Features
Fast Access Times of 90/120/150 ns.
Output Configurable as 32 / 16 / 8 bit wide.
Commercial, Industrial, or Military (Restricted) grade.
Automatic Write/Erase by Embedded Algorithm - end of
Write/Erase indicated by DATA Polling and Toggle Bit.
Flexible Sector Erase Architecture - 64K byte sector
size, with hardware protection of sector groups.
Single Byte Program of 7µs (Typ.)
Erase/Write Cycle Endurance 100,000 (Min.) - E variant.
Description
The PUMA 68F32006 is a high density 32Mbit
CMOS 5V Only FLASH memory organised as
1M x 32 in a JEDEC 68 pin surface mount
PLCC, with read access times of 90, 120, and
150ns.
The output width is user configurable as 8 , 16
or 32 bits using four Chip Selects (CE1~4) for
optimum application flexibility.
The module incorporates Embedded Algorithms
for Program and Erase with Sector architecture
(64K sector) and supports full chip erase.
The device also features hardware sector
protection, which disables both program and
erase operations in any of the 64 sectors on the
module.
Block Diagram (see page 24 for 'A' version)
Pin Definition (see page 24 for 'A' version)
NC
A0
A1
A2
A3
A4
A5
CS3
GND
CS4
WE
A6
A7
A8
A9
A10
Vcc
A0~A19
OE
WE
1M x 8
FLASH
CS1
CS2
CS3
CS4
D0~7
D8~15
D16~23
D24~31
1M x 8
FLASH
1M x 8
FLASH
1M x 8
FLASH
D0
D1
D2
D3
D4
D5
D6
D7
GND
D8
D9
D10
D11
D12
D13
D14
D15
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
10
60
11
59
12
58
13
57
14
56
15
55
16
54
VIEW
17
53
FROM
18
52
19
51
ABOVE
20
50
21
49
22
48
23
47
24
46
25
45
26
44
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
PUMA 68F32006
D16
D17
D18
D19
D20
D21
D22
D23
GND
D24
D25
D26
D27
D28
D29
D30
D31
A0-A19
CE1-4
OE
GND
Address Input
Chip Enables
Output Enable
Ground
Pin Functions
D0-D31
WE
Vcc
Vcc
A11
A12
A13
A14
A15
A16
CS1
OE
CS2
A17
NC
NC
NC
A18
GND
A19
Data Inputs/Outputs
Write Enable (WE1-4 for 'A' version)
Power (+5V)

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