M24C64-FMN6TGP datasheet, PDF - EEWORLD Datasheet

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M24C64-FMN6TGP: Description8KX8 I2C/2-WIRE SERIAL EEPROM, PDSO8, 0.150 INCH, ROHS COMPLIANT, PLASTIC, SOP-8; Categorystorage storage; File Size822KB，42 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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M24C64-FMN6TGP Overview

8KX8 I2C/2-WIRE SERIAL EEPROM, PDSO8, 0.150 INCH, ROHS COMPLIANT, PLASTIC, SOP-8

M24C64-FMN6TGP Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	STMicroelectronics
Parts packaging code	SOIC
package instruction	SOP,
Contacts	8
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum clock frequency (fCLK)	0.4 MHz
JESD-30 code	R-PDSO-G8
JESD-609 code	e4
length	4.9 mm
memory density	65536 bit
Memory IC Type	EEPROM
memory width	8
Humidity sensitivity level	1
Number of functions	1
Number of terminals	8
word count	8192 words
character code	8000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	8KX8
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	SERIAL
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	1.75 mm
Serial bus type	I2C
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
width	3.9 mm
Maximum write cycle time (tWC)	10 ms

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M24C64-W M24C64-R M24C64-F

M24C64-DF

64-Kbit serial I²C bus EEPROM

Datasheet

production data

Features



Compatible with all I

C bus modes:

– 1 MHz

– 400 kHz

– 100 kHz



Memory array:

– 64 Kbit (8 Kbytes) of EEPROM

– Page size: 32 bytes

– Additional Write lockable page



(M24C64-D order codes)



Single supply voltage:

– 1.7 V to 5.5 V over –40 °C / +85 °C



Write:

– Byte Write within 5 ms

– Page Write within 5 ms

TSSOP8 (DW)

169 mil width

SO8 (MN)

150 mil width



Random and sequential Read modes



Write protect of the whole memory array



Enhanced ESD/Latch-Up protection

PDIP8 (BN)



More than 4 million Write cycles



More than 200-year data retention



Packages:

– RoHS compliant and halogen-free

(ECOPACK

)

UFDFPN8

(MC)

WLCSP (CS)

Thin WLCSP (CT)

November 2013

This is information on a product in full production.

DocID16891 Rev 28

1/42

www.st.com

Contents

M24C64-W M24C64-R M24C64-F



Contents

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1

2.2

2.3

2.4

2.5

2.6

Serial Clock (SCL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Serial Data (SDA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Chip Enable (E2, E1, E0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Write Control (WC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

(ground) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Supply voltage (V

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.6.1

2.6.2

2.6.3

2.6.4

Operating supply voltage (V

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Power-down conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.1

4.2

4.3

4.4

4.5

Start condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Stop condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Acknowledge bit (ACK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Device addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.1

Write operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.1.1

5.1.2

5.1.3

5.1.4

5.1.5

5.1.6

Byte Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Page Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Write Identification Page (M24C64-D only) . . . . . . . . . . . . . . . . . . . . . . 17

Lock Identification Page (M24C64-D only) . . . . . . . . . . . . . . . . . . . . . . 17

ECC (Error Correction Code) and Write cycling . . . . . . . . . . . . . . . . . . 17

Minimizing Write delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . 18

Random Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5.2

Read operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

5.2.1

2/42

DocID16891 Rev 28

List of tables

M24C64-W M24C64-R M24C64-F



List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Most significant address byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Least significant address byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Operating conditions (voltage range W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Operating conditions (voltage range R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Operating conditions (voltage range F) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Input parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Cycling performance by groups of four bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Memory cell data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

DC characteristics (M24C64-W, device grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

DC characteristics (M24C64-R, device grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

DC characteristics (M24C64-F, M24C64-DF, device grade 6) . . . . . . . . . . . . . . . . . . . . . . 28

400 kHz AC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

1 MHz AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

TSSOP8 – 8-lead thin shrink small outline, package mechanical data. . . . . . . . . . . . . . . . 33

SO8N – 8-lead plastic small outline, 150 mils body width, package data. . . . . . . . . . . . . . 34

PDIP8 – 8-pin plastic DIP, 0.25 mm lead frame, package mechanical data. . . . . . . . . . . . 35

UFDFPN8 (MLP8) – package dimensions (UFDFPN: Ultra thin Fine pitch

Dual Flat Package, No lead) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

WLCSP 5-bump wafer-length chip-scale package mechanical data



(M24C64-FCS6TP/K) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Thin WLCSP 8-bump wafer-length chip-scale package mechanical data

(M24C64-DFCT6TP/K) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

4/42

DocID16891 Rev 28

M24C64-W M24C64-R M24C64-F



List of figures

Figure 1.

Figure 2.

Figure 3.

Figure 4.

Figure 5.

Figure 6.

Figure 7.

Figure 8.

Figure 9.

Figure 10.

Figure 11.

Figure 12.

Figure 13.

Figure 14.

Figure 15.

Figure 16.

Figure 17.

Figure 18.

Figure 19.

Figure 20.

Figure 21.

Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

8-pin package connections, top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

5-bump WLCSP connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

8-bump thin WLCSP connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

C bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Write mode sequences with WC = 0 (data write enabled) . . . . . . . . . . . . . . . . . . . . . . . . . 15

Write mode sequences with WC = 1 (data write inhibited) . . . . . . . . . . . . . . . . . . . . . . . . . 16

Write cycle polling flowchart using ACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Read mode sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Maximum R

bus

value versus bus parasitic capacitance (C

bus

) for

an I

C bus at maximum frequency f

= 400 kHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Maximum R

bus

value versus bus parasitic capacitance C

bus

) for

an I

C bus at maximum frequency f

= 1MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

TSSOP8 – 8-lead thin shrink small outline, package outline . . . . . . . . . . . . . . . . . . . . . . . 33

SO8N – 8-lead plastic small outline, 150 mils body width, package outline . . . . . . . . . . . . 34

PDIP8 – 8-pin plastic DIP, 0.25 mm lead frame, package outline . . . . . . . . . . . . . . . . . . . 35

UFDFPN8 (MLP8) – package outline (UFDFPN: Ultra thin Fine pitch . . . . . . . . . . . . . . . . . .



Dual Flat Package, No lead) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

WLCSP 5-bump wafer-length chip-scale package outline

(M24C64-FCS6TP/K) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Thin WLCSP 8-bump wafer-length chip-scale package outline

(M24C64-DFCT6TP/K) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

DocID16891 Rev 28

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Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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