Nibble Mode DRAM, 1MX1, 70ns, CMOS, PZIP20, 0.400 INCH, PLASTIC, ZIP-20
| Parameter Name | Attribute value |
| Is it lead-free? | Contains lead |
| Is it Rohs certified? | incompatible |
| Maker | Hitachi （Renesas ） |
| Parts packaging code | ZIP |
| package instruction | ZIP, ZIP20,.1 |
| Contacts | 20 |
| Reach Compliance Code | unknown |
| ECCN code | EAR99 |
| access mode | NIBBLE |
| Maximum access time | 70 ns |
| Other features | RAS ONLY/CAS BEFORE RAS REFRESH |
| I/O type | SEPARATE |
| JESD-30 code | R-PZIP-T20 |
| JESD-609 code | e0 |
| length | 25.61 mm |
| memory density | 1048576 bit |
| Memory IC Type | NIBBLE MODE DRAM |
| memory width | 1 |
| Number of functions | 1 |
| Number of ports | 1 |
| Number of terminals | 20 |
| word count | 1048576 words |
| character code | 1000000 |
| Operating mode | ASYNCHRONOUS |
| Maximum operating temperature | 70 °C |
| Minimum operating temperature | |
| organize | 1MX1 |
| Output characteristics | 3-STATE |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | ZIP |
| Encapsulate equivalent code | ZIP20,.1 |
| Package shape | RECTANGULAR |
| Package form | IN-LINE |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
| power supply | 5 V |
| Certification status | Not Qualified |
| refresh cycle | 512 |
| Maximum seat height | 10.16 mm |
| Maximum standby current | 0.001 A |
| Maximum slew rate | 0.08 mA |
| Maximum supply voltage (Vsup) | 5.5 V |
| Minimum supply voltage (Vsup) | 4.5 V |
| Nominal supply voltage (Vsup) | 5 V |
| surface mount | NO |
| technology | CMOS |
| Temperature level | COMMERCIAL |
| Terminal surface | Tin/Lead (Sn/Pb) |
| Terminal form | THROUGH-HOLE |
| Terminal pitch | 1.27 mm |
| Terminal location | ZIG-ZAG |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| width | 2.85 mm |
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