EDD2508AMTA-7B-E datasheet, PDF

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EDD2508AMTA-7B-E: DescriptionDDR DRAM, 32MX8, 0.75ns, CMOS, PDSO66, PLASTIC, TSOP2-66; Categorystorage storage; File Size375KB，34 Pages; ManufacturerELPIDA; Websitehttp://www.elpida.com/en; Environmental Compliance

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EDD2508AMTA-7B-E Overview

DDR DRAM, 32MX8, 0.75ns, CMOS, PDSO66, PLASTIC, TSOP2-66

EDD2508AMTA-7B-E Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	ELPIDA
Parts packaging code	TSOP2
package instruction	TSOP2,
Contacts	66
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	FOUR BANK PAGE BURST
Maximum access time	0.75 ns
Other features	AUTO/SELF REFRESH
JESD-30 code	R-PDSO-G66
JESD-609 code	e6
length	22.22 mm
memory density	268435456 bit
Memory IC Type	DDR DRAM
memory width	8
Number of functions	1
Number of ports	1
Number of terminals	66
word count	33554432 words
character code	32000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	32MX8
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP2
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	1.2 mm
self refresh	YES
Maximum supply voltage (Vsup)	2.7 V
Minimum supply voltage (Vsup)	2.3 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Bismuth (Sn/Bi)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10.16 mm

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PRELIMINARY DATA SHEET

256M bits DDR SDRAM

EDD2508AMTA (32M words

8 bits)

EDD2516AMTA (16M words

16 bits)

Description

The EDD2508AM is a 256M bits Double Data Rate

(DDR) SDRAM organized as 8,388,608 words

8 bits

4 banks. The EDD2516AM is a 256M bits DDR

SDRAM organized as 4,194,304 words

16 bits

banks. Read and write operations are performed at the

cross points of the CK and the /CK. This high-speed

data transfer is realized by the 2 bits prefetch-pipelined

architecture. Data strobe (DQS) both for read and

write are available for high speed and reliable data bus

design. By setting extended mode resister, the on-chip

Delay Locked Loop (DLL) can be set enable or disable.

They are packaged in standard 66-pin plastic TSOP

(II).

Pin Configurations

/xxx indicates active low signal.

66-pin plastic TSOP(II)

VDD

DQ0

VDDQ VDDQ

DQ1

DQ2

VSSQ VSSQ

DQ3

DQ2

DQ4

VDDQ VDDQ

DQ5

DQ3

DQ6

VSSQ VSSQ

DQ7

VDDQ VDDQ

NC LDQS

VDD

LDM

/WE

/CAS

/RAS

/CS

BA0

BA1

A10(AP) A10(AP)

VDD

VSS VSS

DQ15 DQ7

VSSQ VSSQ

DQ14 NC

DQ13 DQ6

VDDQ VDDQ

DQ12 NC

DQ11 DQ5

VSSQ VSSQ

DQ10 NC

DQ9 DQ4

VDDQ VDDQ

DQ8 NC

VSSQ VSSQ

UDQS DQS

VREF VREF

VSS VSS

UDM DM

/CK /CK

CKE CKE

A12 A12

A11 A11

VSS VSS

Features

•

2.5 V power supply: VDDQ = 2.5V

0.2V

: VDD = 2.5V

0.2V

•

Data rate: 333Mbps/266Mbps (max.)

•

Double Data Rate architecture; two data transfers per

clock cycle

•

Bi-directional, data strobe (DQS) is transmitted

/received with data, to be used in capturing data at

the receiver

•

Data inputs, outputs, and DM are synchronized with

DQS

•

4 internal banks for concurrent operation

•

DQS is edge aligned with data for READs; center

aligned with data for WRITEs

•

Differential clock inputs (CK and /CK)

•

DLL aligns DQ and DQS transitions with CK

transitions

•

Commands entered on each positive CK edge; data

and data mask referenced to both edges of DQS

•

Data mask (DM) for write data

•

Auto precharge option for each burst access

•

2.5 V (SSTL_2 compatible) I/O

•

Programmable burst length (BL): 2, 4, 8

•

Programmable /CAS latency (CL): 2, 2.5

•

Refresh cycles: 8192 refresh cycles/64ms

⎯

7.8μs maximum average periodic refresh interval

•

2 variations of refresh

⎯

Auto refresh

⎯

Self refresh

Document No. E0405E10 (Ver. 1.0)

Date Published September 2003 (K) Japan

URL: http://www.elpida.com

X 16

A0 to A12

BA0, BA1

DQ0 to DQ15

(Top view)

DQS, UDQS, LDQS

/CS

/RAS

/CAS

/WE

DM, UDM, LDM

/CK

CKE

VREF

VDD

VSS

VDDQ

VSSQ

Address input

Bank select address

Data-input/output

Input and output data strobe

Chip select

Row address strobe command

Column address strobe command

Write enable

Input mask

Clock input

Differential clock input

Clock enable

Input reference voltage

Power for internal circuit

Ground for internal circuit

Power for DQ circuit

Ground for DQ circuit

No connection

This product became EOL in March, 2007.

©Elpida

Memory, Inc. 2003

EDD2508AMTA, EDD2516AMTA

CONTENTS

Description .................................................................................................................................................... 1

Features ........................................................................................................................................................ 1

Pin Configurations......................................................................................................................................... 1

Ordering Information ..................................................................................................................................... 2

Part Number.................................................................................................................................................. 2

Electrical Specifications ................................................................................................................................ 4

Block Diagram............................................................................................................................................. 11

Pin Function ................................................................................................................................................ 12

Command Operation................................................................................................................................... 14

Simplified State Diagram ............................................................................................................................ 22

Operation of the DDR SDRAM ................................................................................................................... 23

Timing Waveforms ...................................................................................................................................... 25

Package Drawing........................................................................................................................................ 31

Recommended Soldering Conditions ......................................................................................................... 32

Preliminary Data Sheet E0405E10 (Ver. 1.0)

EDD2508AMTA-7B-E Related Products

	EDD2508AMTA-7B-E	EDD2516AMTA-7A-E	EDD2508AMTA-7A-E	EDD2508AMTA-6B-E
Description	DDR DRAM, 32MX8, 0.75ns, CMOS, PDSO66, PLASTIC, TSOP2-66	DDR DRAM, 16MX16, 0.75ns, CMOS, PDSO66, PLASTIC, TSOP2-66	DDR DRAM, 32MX8, 0.75ns, CMOS, PDSO66, PLASTIC, TSOP2-66	DDR DRAM, 32MX8, 0.7ns, CMOS, PDSO66, PLASTIC, TSOP2-66
Is it Rohs certified?	conform to	conform to	conform to	conform to
Maker	ELPIDA	ELPIDA	ELPIDA	ELPIDA
Parts packaging code	TSOP2	TSOP2	TSOP2	TSOP2
package instruction	TSOP2,	TSOP2,	TSOP2,	TSOP2,
Contacts	66	66	66	66
Reach Compliance Code	unknown	unknown	unknown	unknown
ECCN code	EAR99	EAR99	EAR99	EAR99
access mode	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST
Maximum access time	0.75 ns	0.75 ns	0.75 ns	0.7 ns
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
JESD-30 code	R-PDSO-G66	R-PDSO-G66	R-PDSO-G66	R-PDSO-G66
JESD-609 code	e6	e6	e6	e6
length	22.22 mm	22.22 mm	22.22 mm	22.22 mm
memory density	268435456 bit	268435456 bit	268435456 bit	268435456 bit
Memory IC Type	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM
memory width	8	16	8	8
Number of functions	1	1	1	1
Number of ports	1	1	1	1
Number of terminals	66	66	66	66
word count	33554432 words	16777216 words	33554432 words	33554432 words
character code	32000000	16000000	32000000	32000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C
organize	32MX8	16MX16	32MX8	32MX8
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSOP2	TSOP2	TSOP2	TSOP2
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)	260	260	260	260
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.2 mm	1.2 mm	1.2 mm	1.2 mm
self refresh	YES	YES	YES	YES
Maximum supply voltage (Vsup)	2.7 V	2.7 V	2.7 V	2.7 V
Minimum supply voltage (Vsup)	2.3 V	2.3 V	2.3 V	2.3 V
Nominal supply voltage (Vsup)	2.5 V	2.5 V	2.5 V	2.5 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Bismuth (Sn/Bi)	Tin/Bismuth (Sn/Bi)	Tin/Bismuth (Sn/Bi)	Tin/Bismuth (Sn/Bi)
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.65 mm	0.65 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	10.16 mm	10.16 mm	10.16 mm	10.16 mm
Is it lead-free?	Lead free	-	Lead free	Lead free

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