PRELIMINARY INFORMATION
ICS3757
High Performance VCXO plus Multiplier for HDTV
PDescription
The ICS3757 combines a low-noise VCXO and a PLL
frequency multiplier to create a high frequency VCXO
with the low phase noise required for driving
high-speed SERDES in SMPTE 292M compliant
applications.
Features
•
•
•
•
•
•
•
Packaged in 16-pin TSSOP
3.3 V supply voltage
27 MHz pullable crystal input provides flexibility
Selectable 74.25 MHz or 74.175824 MHz output
clock
27 MHz reference clock output
Low phase noise and jitter
Compliant to SMPTE 292M jitter specification
Block Diagram
VDD
2
VDDR
VDDO
2
X1
27 MHz
pullable crystal
input
X2
VCXO
Optional crystal
Capacitors for timing
VIN
2
GND
PLL
Clock
Synthesis
and
Control
Circuitry
Output
Driver
CLK
Output
Driver
REFCLK
SEL
OER
MDS 3757 A
Integrated Circuit Systems, Inc.
●
1
525 Race Street, San Jose, CA 95126
●
Revision 030606
tel (408) 297-1201
●
www.icst.com
PRELIMINARY INFORMATION
ICS3757
High Performance VCXO plus Multiplier for HDTV
Pin Assignment
X1
X2
VDD
VIN
GND
VDD
SEL
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NC
VDDO
VDDO
CLK
GND
OER
VDDR
REFCLK
Frequency Selection Table
SEL
0
1
CLK Output Frequency
74.175824 MHz
74.25 MHz
Pin Descriptions
Pin
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin
Name
X1
X2
VDD
VIN
GND
VDD
SEL
NC
REFCLK
VDDR
OER
GND
CLK
VDDO
VDDO
NC
Pin
Type
Input
Output
Power
Input
Power
Power
Input
—
Output
Power
Input
Power
Output
Power
Power
—
Pin Description
Crystal connection. Connect to a 27 MHz fundamental pullable crystal.
Crystal connection. Connect to a 27 MHz fundamental pullable crystal.
Connect to +3.3 V.
Voltage input to VCXO. 0 to +3.3 V analog input which controls the oscillation frequency of
the VCXO.
Connect to ground.
Connect to +3.3 V.
Frequency select input. Internal pull-up. Selects frequency of CLK output. See table above.
No Connect. Do not connect this pin to anything.
Reference clock output that runs at the input crystal or clock frequency.
VDD for the REFCLK output. Connect to +2.5 V or +3.3 V. Output tri-states when low.
Output Enable for the reference (pin 10). Internal pull-up. Low to tri-state ref clock.
Connect to ground.
Output clock that runs at the frequency shown in the Frequency Selection table.
VDD for the CLK output. Connect to +2.5 V or +3.3 V.
VDD for the CLK output. Connect to +2.5 V or +3.3 V.
No Connect. Do not connect this pin to anything.
MDS 3757 A
2
●
Revision 030606
tel (408) 297-1201
●
Integrated Circuit Systems, Inc.
●
525 Race Street, San Jose, CA 95126
www.icst.com
PRELIMINARY INFORMATION
ICS3757
High Performance VCXO plus Multiplier for HDTV
External Component Selection
The ICS3757 requires a minimum number of external
components for proper operation.
For crystal frequencies between 12 MHz and 36 MHz,
the nominal crystal load capacitance specification
should be 14 pF. Contact ICS applications regarding
the use of a crystal below 12 MHz.
The external crystal must be connected as close to the
chip as possible and should be on the same side of the
PCB as the ICS3757. There should be no vias between
the crystal pins and the X1 and X2 device pins. There
should be no signal traces underneath or close to the
crystal. See application note MAN05.
Decoupling Capacitor
A decoupling capacitor of 0.01µF must be connected
between VDD and GND, as close to these pins as
possible. For optimum device performance, the
decoupling capacitor should be mounted on the
component side of the PCB. Avoid the use of vias in the
decoupling circuit.
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. The need for these capacitors
is determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture
and frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
The procedure for determining the value of these
capacitors can be found in application note MAN05.
Series Termination Resistor
When the PCB trace between the clock output (CLK,
pin 3) and the load is over 1 inch, series termination
should be used. To series terminate a 50Ω trace (a
commonly used trace impedance) place a 33Ω resistor
in series with the clock line, as close to the clock output
pin as possible. The nominal impedance of the clock
output is 20Ω
.
Quartz Crystal
The ICS3757 VCXO function consists of the external
crystal and the integrated VCXO oscillator circuit. To
assure the best system performance (frequency pull
range) and reliability, a crystal device with the
recommended parameters (shown below) must be
used, and the layout guidelines discussed in the
following section shown must be followed.
The frequency of oscillation of a quartz crystal is
determined by its “cut” and by the load capacitors
connected to it. The ICS3757 incorporates on-chip
variable load capacitors that “pull” (change) the
frequency of the crystal. The crystal specified for use
with the ICS3757 is designed to have zero frequency
error when the total of on-chip + stray capacitance is 14
pF.
Recommended Pullable Crystal Parameters:
Initial Accuracy at 25
°
C
±20 ppm
Temperature Stability
±30 ppm
Aging
±20 ppm
Load Capacitance
14 pf
Shunt Capacitance, C0
7 pF Max
C0/C1 Ratio
250 Max
Equivalent Series Resistance
35
Ω
Max
MDS 3757 A
3
●
Revision 030606
tel (408) 297-1201
●
Integrated Circuit Systems, Inc.
●
525 Race Street, San Jose, CA 95126
www.icst.com
PRELIMINARY INFORMATION
ICS3757
High Performance VCXO plus Multiplier for HDTV
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS3757. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
5.5 V
Rating
-0.5 V to VDD+0.5 V
0 to +70° C
-65 to +150° C
125° C
260° C
Recommended Operation Conditions (all versions)
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Min.
0
+3.0
Typ.
Max.
+70
+3.6
Units
°
C
V
DC Electrical Characteristics
Unless stated otherwise,
VDD = 3.3 V ±10%, VDDO = 3.3 V, VDDR = 3.3 V,
Ambient Temp. 0 to +70° C
Parameter
Operating Voltage
Symbol
VDD
VDDO
VDDR
Conditions
Min.
3.0
2.5
2.5
Typ.
Max.
3.6
VDD
VDD
Units
V
V
V
mA
mA
V
Supply Current
Input High Voltage
Input Low Voltage
Output High Voltage
Output High Voltage
Output Low Voltage
Short Circuit Current
Nominal Output Impedance
Input Capacitance
Internal Pull-up Resistor
IDD
V
IH
V
IL
V
OH
V
OH
V
OL
I
OS
Z
OUT
C
IN
R
PU
No Load, OER = 1
No Load, OER = 0
Input selects
Input selects
I
OH
= -4 mA
I
OH
= -20 mA
I
OL
= 20 mA
Each output
Input pins
VDD-0.4
2.4
2
35
TBD
0.8
V
V
V
0.4
±65
20
7
120
V
mA
Ω
pF
kΩ
MDS 3757 A
4
●
Revision 030606
tel (408) 297-1201
●
Integrated Circuit Systems, Inc.
●
525 Race Street, San Jose, CA 95126
www.icst.com
PRELIMINARY INFORMATION
ICS3757
High Performance VCXO plus Multiplier for HDTV
AC Electrical Characteristics
Unless stated otherwise,
VDD = 3.3 V ±10%, VDDO = 3.3 V, VDDR = 3.3 V,
Ambient Temp. 0 to +70° C
Parameter
Crystal Frequency
Output Clock Rise Time
Output Clock Fall Time
Output Duty Cycle
Power-up Time
Power-down Time
Jitter, short term,
peak-to-peak
Jitter, long term,
peak-to-peak
Single Sideband Phase
Noise
Actual Mean Frequency
Error versus Target
Timing Jitter (to SMPTE
292M)
Alignment Jitter (to SMPTE
292M)
Symbol
t
OR
t
OF
t
OD
t
PU
t
PD
Conditions
20% to 80%, 15 pF load
80% to 20%, 15 pF load
at VDD/2, 15 pF load
Valid power on to valid
output
Power off to clock
disable
Min.
Typ.
27
Max.
1.5
1.5
Units
MHz
ns
ns
%
ms
µs
ps
ps
dBc
ppm
40
49 to 51
1
10
100
60
10 µs delay
10 kHz offset
200
-120
0
10 Hz to 1/10 clock rate
10 kHz to 1/10 clock
rate
TBD
TBD
1.0
0.2
UI
UI
Thermal Characteristics
Parameter
Thermal Resistance Junction to
Ambient
Symbol
θ
JA
θ
JA
θ
JA
θ
JC
Conditions
Still air
1 m/s air flow
3 m/s air flow
Min.
Typ.
78
70
68
37
Max. Units
°
C/W
°
C/W
°
C/W
°
C/W
Thermal Resistance Junction to Case
MDS 3757 A
5
●
Revision 030606
tel (408) 297-1201
●
Integrated Circuit Systems, Inc.
●
525 Race Street, San Jose, CA 95126
www.icst.com
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