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FST16210MTD

Description
CBT/FST/QS/5C/B SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO48, 6.10 MM, MO-153ED, TSSOP-48
Categorylogic    logic   
File Size797KB,5 Pages
ManufacturerRochester Electronics
Websitehttps://www.rocelec.com/
Environmental Compliance  
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FST16210MTD Overview

CBT/FST/QS/5C/B SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO48, 6.10 MM, MO-153ED, TSSOP-48

FST16210MTD Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerRochester Electronics
Parts packaging codeTSSOP
package instructionTSSOP,
Contacts48
Reach Compliance Codeunknown
seriesCBT/FST/QS/5C/B
JESD-30 codeR-PDSO-G48
JESD-609 codee3
length12.5 mm
Logic integrated circuit typeBUS DRIVER
Humidity sensitivity levelNOT SPECIFIED
Number of digits10
Number of functions2
Number of ports2
Number of terminals48
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
propagation delay (tpd)0.25 ns
Certification statusCOMMERCIAL
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4 V
Nominal supply voltage (Vsup)4.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width6.1 mm

FST16210MTD Preview

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FST16210 20-Bit Bus Switch
November 1998
Revised June 2005
FST16210
20-Bit Bus Switch
General Description
The Fairchild Switch FST16210 provides 20-Bits of high-
speed CMOS TTL-compatible bus switching. The low on
resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise.
The device is organized as a 10-bit or 20-Bit bus switch.
When OE
1
is LOW, the switch is ON and Port 1A is con-
nected to Port 1B. When OE
2
is LOW, Port 2A is connected
to Port 2B.
Features
s
4
:
switch connection between two ports.
s
Minimal propagation delay through the switch.
s
Low l
CC
.
s
Zero bounce in flow-through mode.
s
Control inputs compatible with TTL level.
Ordering Code:
Order Number
FST16210MTD
Package Number
MTD48
Package Description
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Logic Diagram
Truth Table
Pin Descriptions
Pin Name
OE
1
, OE
2
1A, 2A
1B, 2B
Description
Bus Switch Enables
Bus A
Bus B
OE
1
L
L
H
H
Inputs
OE
2
L
H
L
H
Inputs/Outputs
1A, 1B
1A
1A
Z
Z
1B
1B
2A
Z
2A, 2B
2A
Z
2B
2B
© 2005 Fairchild Semiconductor Corporation
DS500193
www.fairchildsemi.com
FST16210
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Switch Voltage (V
S
)
DC Input Voltage (V
IN
) (Note 2)
DC Input Diode Current (l
IK
) V
IN

0V
DC Output (I
OUT
) Sink Current
DC V
CC
/GND Current (I
CC
/I
GND
)
Storage Temperature Range (T
STG
)

0.5V to

7.0V

0.5V to

7.0V

0.5V to

7.0V

50mA
128mA
Recommended Operating
Conditions
(Note 3)
Power Supply Operating (V
CC)
Input Voltage (V
IN
)
Output Voltage (V
OUT
)
Input Rise and Fall Time (t
r
, t
f
)
Switch Control Input
Switch I/O
Free Air Operating Temperature (T
A
)
0nS/V to 5nS/V
0nS/V to DC
-40
q
C to

85
q
C
4.0V to 5.5V
0V to 5.5V
0V to 5.5V

/

100mA

65
q
C to

150
q
C
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2:
The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3:
Unused control inputs must be held high or low. They may not float.
DC Electrical Characteristics
Symbol
V
IK
V
IH
V
IL
I
I
I
OZ
R
ON
Parameter
Clamp Diode Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
Input Leakage Current
OFF-STATE Leakage Current
Switch On Resistance
(Note 5)
V
CC
(V)
4.5
4.0–5.5
4.0–5.5
5.5
0
5.5
4.5
4.5
4.5
4.0
I
CC
Quiescent Supply Current
Increase in I
CC
per Input
5.0V and T
A
T
A
Min

40
q
C to

85
q
C
Typ
(Note 4)
Max
Units
V
V
0.8
V
I
IN
Conditions

1.2
2.0

18mA
r
1.0
10
P
A
P
A
P
A
:
:
:
:
P
A
mA
0
d
V
IN
d
5.5V
V
IN
V
IN
V
IN
V
IN
V
IN
V
IN
5.5V
0V, I
IN
0V, I
IN
2.4V, I
IN
2.4V, I
IN
64mA
30mA
15mA
15mA
0
0
d
A, B
d
V
CC
r
1.0
4
4
8
11
7
7
12
20
3
2.5
5.5
5.5

25
q
C
V
CC
or GND, I
OUT
'
I
CC
One input at 3.4V
Other inputs at V
CC
or GND
Note 4:
Typical values are at V
CC
Note 5:
Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
FST16210
AC Electrical Characteristics
T
A
Symbol
Parameter
V
CC
Min
t
PHL
,t
PLH
t
PZH
, t
PZL
t
PHZ
, t
PLZ
Propagation Delay Bus to Bus
(Note 6)
Output Enable Time
Output Disable Time
1.5
1.5
C
L

40
q
C to

85
q
C,
RD
500
:
4.0V
Max
0.25
6.5
7.2
ns
ns
ns
V
I
V
I
V
I
7.0
V
I
V
I
OPEN
7V for t
PZL
OPEN for t
PZH
7V for t
PLZ
OPEN for t
PHZ
Figures
1, 2
Figures
1, 2
Figures
1, 2
Units
Conditions
V
CC
Min
Figure
No.
50pF, RU
4.5 – 5.5V
Max
0.25
6.0
Note 6:
This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
Resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
C
IN
C
I/O
Note 7:
T
A
(Note 7)
Parameter
Typ
3
6
Max
Units
pF
pF
V
CC
Conditions
5.0V
5.0V
Control Pin Input Capacitance
Input/Output Capacitance

25
q
C, f
V
CC
, OE
1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note:
Input driven by 50
:
source terminated in 50
:
Note:
C
L
includes load and stray capacitance
Note:
Input PRR
1.0 MHz, t
W
500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST16210 20-Bit Bus Switch
Physical Dimensions
inches (millimeters) unless otherwise noted
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384(FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
4
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com

FST16210MTD Related Products

FST16210MTD FST16210MTDX
Description CBT/FST/QS/5C/B SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO48, 6.10 MM, MO-153ED, TSSOP-48 CBT/FST/QS/5C/B SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO48, 6.10 MM, MO-153ED, TSSOP-48
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Maker Rochester Electronics Rochester Electronics
Parts packaging code TSSOP TSSOP
package instruction TSSOP, TSSOP,
Contacts 48 48
Reach Compliance Code unknown unknown
series CBT/FST/QS/5C/B CBT/FST/QS/5C/B
JESD-30 code R-PDSO-G48 R-PDSO-G48
JESD-609 code e3 e3
length 12.5 mm 12.5 mm
Logic integrated circuit type BUS DRIVER BUS DRIVER
Humidity sensitivity level NOT SPECIFIED 2
Number of digits 10 10
Number of functions 2 2
Number of ports 2 2
Number of terminals 48 48
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Output characteristics 3-STATE 3-STATE
Output polarity TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) NOT SPECIFIED 260
propagation delay (tpd) 0.25 ns 0.25 ns
Certification status COMMERCIAL COMMERCIAL
Maximum seat height 1.2 mm 1.2 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4 V 4 V
Nominal supply voltage (Vsup) 4.5 V 4.5 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface TIN MATTE TIN
Terminal form GULL WING GULL WING
Terminal pitch 0.5 mm 0.5 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
width 6.1 mm 6.1 mm
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