SN54S51W-10 datasheet, PDF - EEWORLD Datasheet

SN54S51W-10: DescriptionS SERIES, DUAL 4-INPUT AND-OR-INVERT GATE, CDFP14; Categorylogic logic; File Size981KB，21 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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SN54S51W-10 Overview

S SERIES, DUAL 4-INPUT AND-OR-INVERT GATE, CDFP14

Parameter Name	Attribute value
Maker	Texas Instruments
Reach Compliance Code	unknown
series	S
JESD-30 code	R-GDFP-F14
length	9.21 mm
Load capacitance (CL)	15 pF
Logic integrated circuit type	AND-OR-INVERT GATE
Number of functions	2
Number of entries	4
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DFP
Package shape	RECTANGULAR
Package form	FLATPACK
Maximum supply current (ICC)	22 mA
propagation delay (tpd)	5.5 ns
Certification status	Not Qualified
Maximum seat height	2.03 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	TTL
Temperature level	MILITARY
Terminal form	FLAT
Terminal pitch	1.27 mm
Terminal location	DUAL
width	6.29 mm

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

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