MT4VDDT864HY-202XX datasheet, PDF

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MT4VDDT864HY-202XX: DescriptionDDR DRAM Module, 8MX64, 0.8ns, CMOS, MO-224, SODIMM-200; Categorystorage storage; File Size519KB，29 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/; Environmental Compliance

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MT4VDDT864HY-202XX Overview

DDR DRAM Module, 8MX64, 0.8ns, CMOS, MO-224, SODIMM-200

MT4VDDT864HY-202XX Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Micron Technology
Parts packaging code	SODIMM
package instruction	DIMM,
Contacts	200
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	SINGLE BANK PAGE BURST
Maximum access time	0.8 ns
Other features	AUTO/SELF REFRESH
JESD-30 code	R-XDMA-N200
JESD-609 code	e4
memory density	536870912 bit
Memory IC Type	DDR DRAM MODULE
memory width	64
Number of functions	1
Number of ports	1
Number of terminals	200
word count	8388608 words
character code	8000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	8MX64
Package body material	UNSPECIFIED
encapsulated code	DIMM
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
self refresh	YES
Maximum supply voltage (Vsup)	2.7 V
Minimum supply voltage (Vsup)	2.3 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Gold (Au)
Terminal form	NO LEAD
Terminal location	DUAL
Maximum time at peak reflow temperature	30

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64MB, 128MB (x64)

200-PIN DDR SDRAM SODIMM

SMALL-OUTLINE

DDR SDRAM DIMM

Features

• JEDEC standard 200-pin, small-outline, dual in-line

memory module (DDR SODIMM)

• Fast data transfer rates PC1600, PC2100, or PC2700

• Utilizes 200 MT/s, 266 MT/s, and 333 MT/s DDR

SDRAM components

• 64MB (8 Meg x 64 ) and 128MB (16 Meg x 64)

• V

= V

Q= +2.5V

• V

DDSPD

= +2.3V to +3.6V

• 2.5V I/O (SSTL_2 compatible)

• Commands entered on each positive CK edge

• DQS edge-aligned with data for READs;

centeraligned with data for WRITEs

• Internal, pipelined double data rate (DDR)

architecture; two data accesses per clock cycle

• Bidirectional data strobe (DQS) transmitted/

received with data—i.e., source-synchronous data

capture

• Differential clock inputs (CK and CK#)

• Four internal device banks for concurrent operation

• Selectable burst lengths: 2, 4, or 8

• Auto precharge option

• Auto Refresh and Self Refresh Modes 15.625µs

(64MB); 7.8125µs (128MB) maximum average

periodic refresh interval

• Serial Presence Detect (SPD) with EEPROM

• Selectable READ CAS latency for maximum

compatibility

• Gold edge contacts

MT4VDDT864H – 64MB

MT4VDDT1664H – 128MB

For the latest data sheet, please refer to the Micron

Web

site:

www.micron.com/moduleds

Figure 1: 200-Pin SODIMM (MO-224)

OPTIONS

MARKING

• Package

200-pin SODIMM (Standard)

200-pin SODIMM (Lead-free)

• Memory Clock/Speed/CAS Latency

6ns (167 MHz), 333 MT/s, CL = 2.5

7.5ns (133 MHz), 266 MT/s, CL = 2

7.5ns (133 MHz), 266 MT/s, CL = 2.5

10ns (100 MHz), 200 MT/s, CL = 2

NOTE:

-335

-262

-26A

-265

-202

1. Consult factory for availability of lead-free prod-

ucts.

2. CL = Device CAS (READ) Latency.

Table 1:

Address Table

64MB

128MB

8K (A0–A12)

4 (BA0, BA1)

16 Meg x 16

512 (A0–A8)

1 (S0#)

4K (A0–A11)

4 (BA0, BA1)

8 Meg x 16

512 (A0–A8)

1 (S0#)

Refresh Count

Row Addressing

Device Bank Addressing

Device Configuration

Column Addressing

Module Rank Addressing

09005aef8086ea0b

DD4C8_16x64HG_C.fm - Rev. C 8/03 EN

MT4VDDT864HY-202XX Related Products

	MT4VDDT864HY-202XX	MT4VDDT1664HY-202XX	MT4VDDT1664HG-202XX	MT4VDDT864HG-202XX
Description	DDR DRAM Module, 8MX64, 0.8ns, CMOS, MO-224, SODIMM-200	DDR DRAM Module, 16MX64, 0.8ns, CMOS, MO-224, SODIMM-200	DDR DRAM Module, 16MX64, 0.8ns, CMOS, MO-224, SODIMM-200	DDR DRAM Module, 8MX64, 0.8ns, CMOS, MO-224, SODIMM-200
Is it lead-free?	Lead free	Lead free	Contains lead	Contains lead
Is it Rohs certified?	conform to	conform to	incompatible	incompatible
Maker	Micron Technology	Micron Technology	Micron Technology	Micron Technology
Parts packaging code	SODIMM	SODIMM	SODIMM	SODIMM
package instruction	DIMM,	DIMM,	DIMM,	DIMM,
Contacts	200	200	200	200
Reach Compliance Code	compliant	compliant	compliant	compliant
ECCN code	EAR99	EAR99	EAR99	EAR99
access mode	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST
Maximum access time	0.8 ns	0.8 ns	0.8 ns	0.8 ns
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
JESD-30 code	R-XDMA-N200	R-XDMA-N200	R-XDMA-N200	R-XDMA-N200
memory density	536870912 bit	1073741824 bit	1073741824 bit	536870912 bit
Memory IC Type	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE
memory width	64	64	64	64
Number of functions	1	1	1	1
Number of ports	1	1	1	1
Number of terminals	200	200	200	200
word count	8388608 words	16777216 words	16777216 words	8388608 words
character code	8000000	16000000	16000000	8000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C
organize	8MX64	16MX64	16MX64	8MX64
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
encapsulated code	DIMM	DIMM	DIMM	DIMM
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	260	260	235	235
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
self refresh	YES	YES	YES	YES
Maximum supply voltage (Vsup)	2.7 V	2.7 V	2.7 V	2.7 V
Minimum supply voltage (Vsup)	2.3 V	2.3 V	2.3 V	2.3 V
Nominal supply voltage (Vsup)	2.5 V	2.5 V	2.5 V	2.5 V
surface mount	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	NO LEAD	NO LEAD	NO LEAD	NO LEAD
Terminal location	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30	30

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