PI74LCX646
PI74LCX652
Product Features
• Functionally compatible with FCT3, LVT, and
74 series 646 and 652 families of products
• Tri-State outputs
• 5V Tolerant inputs and outputs
• 2.0V-3.6V V
CC
supply operation
• Balanced sink and source output drives (24 mA)
• Low ground bounce outputs
• Supports live insertion
• ESD Protection exceeds 2000V, Human Body Model
200V, Machine Model
• Packages available:
– 24-pin 209-mil wide plastic SSOP (H)
– 24-pin 173-mil wide plastic TSSOP (L)
– 24-pin 150-mil wide plastic QSOP (Q)
– 24-pin 300-mil wide plastic SOIC (S)
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
Fast CMOS 3.3V 8-Bit Registered Transceiver
Product Description
Pericom Semiconductor’s PI74LCX series of logic circuits are pro-
duced in the Company’s advanced 0.6 micron CMOS technology,
achieving industry leading speed grades.
The PI74LCX646 and PI74LCX652 are designed with a bus
transceiver with 3-state D-type flip-flops and control circuitry
arranged for multiplexed transmission of data directly from the data
bus or from the internal storage registers. The PI74LCX652 utilizes
GAB and GBA signals to control the transceiver functions. The
PI74LCX646 uses the enable control (G) and direction pins (DIR)
to control the transceiver functions. SAB and SBA control pins are
used to select either real-time or stored data transfer. The circuitry
used for select control will eliminate the typical decoding glitch that
occurs in a multiplexer during the transition between real-time and
stored data. A low input level selects real-time data and a high
selects stored data.
The PI74LCX646 and PI74LCX652 can be driven from either 3.3V
or 5.0V devices allowing this device to be used as a translator in a
mixed 3.3/5.0V system.
Logic Block Diagram
PI74LPT652 ONLY
GBA
PI74LPT646
ONLY
G
GAB
DIR
CPBA
SBA
CPAB
SAB
1 OR 8 CHANNELS
B REG
0D
C
0
B
0
A REG
A
0
0D
C
0
TO 7 OTHER CHANNELS
1
PS2104A 02/07/97
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PI74LCX646
PI74LCX652
3.3V 8-BIT REGISTERED TRANSCEIVER
PI74LCX646
Product Pin Configuration
CPAB
SAB
DIR
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
GND
PI74LCX652
Product Pin Configuration Product Pin Description
CPAB
SAB
GAB
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
GND
1
24
2
23
3
22
4
24-PIN
21
H24
20
5
L24
6
19
Q24
18
7
S24
8
17
9
16
10
15
11
14
12
13
V
CC
CPBA
SBA
G
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
1
24
2
23
3
22
4
24-PIN
21
H24
20
5
L24
6
19
Q24
18
7
S24
8
17
9
16
10
15
11
14
12
13
V
CC
CPBA
SBA
GBA
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
Pin Name
A
0
-A
7
B
0
-B
7
CPAB, CPBA
SAB, SBA
DIR, G
GAB, GBA
GND
V
CC
Description
Data Register A Inputs
Data Register B Outputs
Data Register B Inputs
Data Register A Outputs
Clock Pulse Inputs
Output Data Source SelectInputs
Output Enable Inputs (LCX646)
Output Enable Inputs (LCX652)
Ground
Power
PI74LCX646 Truth Table
Inputs
DATA I/O
(2)
Function/Operation
Isolation
Store A and B Data
Real Time B Data to A Bus
Stored B Data to A Bus
Real Time A Data to B Bus
Stored A Data to B Bus
G
H
H
L
L
L
L
DIR
X
X
L
L
H
H
CPAB
H or L
↑
X
X
X
H or L
CPBA
H or L
↑
X
H or L
X
X
SAB
X
X
X
X
L
H
SBA
X
X
L
H
X
X
A0-A7
Input
Output
Input
B0-B7
Input
Input
Output
PI74LCX652 Truth Table
Inputs
DATA I/O
(2)
Function/Operation
Isolation
Store A and B Data
Store A, Hold B
Store A in Both Registers
Hold A, Store B
Store B in Both Registers
Real Time B Data to A Bus
Stored B Data to A Bus
Real Time A Data to B Bus
Stored A Data to B Bus
Stored A Data to B Bus and
Stored B Data to A Bus
GAB
L
L
X
H
L
L
L
L
H
H
H
GBA
H
H
H
H
X
L
L
L
H
H
L
CPAB
H or L
↑
↑
↑
H or L
↑
X
X
X
H or L
H or L
CPBA
H or L
↑
H or L
↑
↑
↑
X
H or L
X
X
H or L
SAB
X
X
X
X
(2)
X
X
X
X
L
H
H
SBA
X
X
X
X
X
X
(2)
L
H
X
X
H
A0-A7
Input
Input
Input
Unspecified
(1)
Output
Output
Input
Output
B0-B7
Input
Unspecified
(1)
Output
Input
Input
Input
Output
Output
Notes:
1. The data output functions may be enabled or disabled by various signals at the GAB or GBA inputs. Data
input functions are always enabled, i.e., data at the bus pins will be stored on every low-to-high transition
on the clock inputs.
2. Select control = L: clocks can occur simultaneously.
Select control = H: clocks must be staggered to load both registers.
H = High Voltage Level; L = Low Voltage Level; X = Don't Care;
↑
= LOW-to-HIGH transition
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PI74LCX646
PI74LCX652
3.3V 8-BIT REGISTERED TRANSCEIVER
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ............................................................. –65°C to +150°C
Ambient Temperature with Power Applied ............................ –40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) ...... –0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) .. –0.5V to +7.0V
DC Input Voltage .................................................................... –0.5V to +7.0V
DC Output Current .............................................................................. 120 mA
Power Dissipation .................................................................................... 1.0W
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the de-
vice. This is a stress rating only and functional opera-
tion of the device at these or any other conditions
above those indicated in the operational
sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended
periods may affect reliability.
Recommended Operating Conditions
Symbol
V
CC
Parameter
Supply Voltage
Operating
Data Retention
V
I
V
O
Input Voltage
Output Voltage
HIGH or LOW State
TRI-State
I
OH
/I
OL
Output Current
V
CC
= 3.0V-3.6V
V
CC
= 2.7V
T
A
Free-Air Operating Temperature
Input Edge Rate
V = 0.8V-2.0V, V
CC
= 3.0V
Min.
2.0
1.5
0
0
0
−
40
0
Max.
3.6
3.6
5.5
V
CC
5.5
±24
±12
+85
10
mA
°C
ns/V
V
Units
∆
t/
∆
V
3
PS2104A 02/07/97
Capacitance
Parameters Description
C
IN
C
OUT
C
PD
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
Test Conditions
V
CC
= Open, V
I
= 0V or V
CC
V
CC
= 3.3V, V
I
= 0V or V
CC
V
CC
= 3.3V, V
I
= 0V or V
CC
, F = 10 MHz
Typ.
7
8
25
pF
Units
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PI74LCX646
PI74LCX652
3.3V 8-BIT REGISTERED TRANSCEIVER
DC Electrical Characteristics
(Over the Operating Range, T
A
=
−40°C
to +85°C, V
CC
= 2.7V to 3.6V)
Parameters Description
V
IH
V
IL
V
OH
Input HIGH Voltage
Input LOW Voltage
Output HIGH Voltage
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= 2.7-3.6
V
CC
= 2.7
V
CC
= 3.0
I
OH
= –0.1mA
I
OH
= –12mA
I
OH
= –18mA
I
OH
= –24mA
V
OL
Output LOW Voltage
V
CC
= 2.7-3.6
V
CC
= 2.7
V
CC
= 3.0
I
OL
= 0.1mA
I
OL
= 12mA
I
OL
= 16mA
I
OL
= 24mA
V
IK
I
I
I
OZ
I
OFF
I
CC
Clamp Diode Voltage
Input Leakage Current
Tri-State Output Leakage
Power Down Disable
Quiescent Power Supply
Current
Quiescent Power Supply
Current
TTL Inputs HIGH
V
CC
= Min., I
IN
= –18mA
0
≤
V
I
≤
5.5V
0
≤
V
O
≤
5.5V
V
I
= V
IH
or V
IL
Vcc = 2.7-3.6
V
CC
= 2.7-3.6
Min.
2.0
—
V
CC
-0.2
2.2
2.4
2.2
—
—
—
—
—
—
—
—
Typ
(2)
—
—
—
—
—
—
—
—
—
—
−
0.7
—
—
—
0.1
Max.
—
0.8
—
—
—
—
0.2
0.4
0.4
0.55
−
1.2
±5
±5
10
10
500
µA
V
Units
V
CC
= 0V, V
IN
or V
OUT
≤
5.5V
V
CC
= Max.
V
CC
= Max.
V
IN
= GND or V
CC
V
IN
= V
CC
– 0.6V
(3)
∆
I
CC
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25°C ambient.
3. Per TTL driven input; all other inputs at V
CC
or GND.
4
PS2104A 02/07/97
Dynamic Switching Characteristics
(T
A
= +25°C)
Parameters
V
OLP
V
OLV
Description
Dynamic LOW Peak Voltage
Dynamic LOW Valley Voltage
Test Conditions
(1)
V
CC
= 3.3V, C
L
= 50pF
V
IH
= 3.3V, V
IL
= 0V
V
CC
= 3.3V, C
L
= 50pF
V
IH
= 3.3V, V
IL
= 0V
Typical
0.8
0.8
Units
V
V
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PI74LCX646
PI74LCX652
3.3V 8-BIT REGISTERED TRANSCEIVER
Switching Characteristics over Operating Range
V
CC
= 3.3V
± 0.3V
Parameters
f
MAX
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PZL
t
PZH
t
PLZ
t
PHZ
TS
TH
TW
V
CC
= 2.7V
Min.
1.5
1.5
1.5
1.5
1.5
2.5
1.5
3.3
Max.
8.0
9.5
9.5
9.5
ns
9.5
Description
Maximum Clock Frequency
Propagation Delay
Bus to Bus
Propagation Delay
Clock to Bus
Propagation Delay
Select to Bus
Output Enable Time
Output Disable Time
Setup Time
Hold Time
Pulse Width
Output to Output Skew
(1)
Conditions
C
L
= 50pF
R
L
= 500
Ω
Min.
150
1.5
1.5
1.5
1.5
1.5
2.5
1.5
3.3
Max.
7.0
8.5
8.5
8.5
8.5
1.0
Units
MHz
t
SK
(0)
Note:
1. Skew between any two outputs, of the same package, switching in the same direction.
Note:
1. Measured with n–1 outputs switching from High-to-Low or Low-to-High. The remaining output is
measured in the LOW state.
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
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PS2104A 02/07/97
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