MK2304S-1 datasheet, PDF - EEWORLD Datasheet

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MK2304S-1: DescriptionPLL Based Clock Driver, 2304 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.150 INCH, SOIC-8; Categorylogic logic; File Size210KB，8 Pages; ManufacturerIDT (Integrated Device Technology)

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MK2304S-1 Overview

PLL Based Clock Driver, 2304 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.150 INCH, SOIC-8

MK2304S-1 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	SOIC
package instruction	0.150 INCH, SOIC-8
Contacts	8
Reach Compliance Code	not_compliant
series	2304
Input adjustment	STANDARD
JESD-30 code	R-PDSO-G8
JESD-609 code	e0
length	4.9 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER
MaximumI(ol)	0.008 A
Humidity sensitivity level	1
Number of functions	1
Number of inverted outputs
Number of terminals	8
Actual output times	4
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP8,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	240
power supply	3.3 V
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.4 ns
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3.9 mm
minfmax	133 MHz

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DATASHEET

ZERO DELAY, LOW SKEW BUFFER

Description

The MK2304-1 is a low jitter, low skew, high performance

Phase Lock Loop (PLL) based zero delay buffer for high

speed applications. Based on IDT’s proprietary low jitter

PLL techniques, the device provides four low skew outputs

at speeds up to 133 MHz at 3.3 V. The MK2304-1 includes

two banks of two outputs each 1X. In the zero delay mode,

the rising edge of the input clock is aligned with the rising

edges of all 4 outputs. Compared to competitive CMOS

devices, the MK2304-1 has the lowest jitter.

IDT manufactures the largest variety of clock generators

and buffers and is the largest clock supplier in the world.

MK2304-1

Features

•

Packaged in 8-pin SOIC

Zero input-output delay

2 banks of two 1X outputs

Output to output skew is less than 200 ps

Output clocks up to 133 MHz at 3.3 V

Full CMOS outputs with 8 mA output drive capability at

TTL levels at 3.3 V

Spectrum clock generators

•

Spread Smart

technology Works with Spread

•

Advanced, low power, sub micron CMOS process

•

Operating voltage of 3.3 V

•

Available in industrial temperature range

Block Diagram

VDD

FBIN

CLKIN

PLL

CLKA1

CLKA2

BANK

CLKB1

CLKB2

BANK

GND

IDT™

ZERO DELAY, LOW SKEW BUFFER

MK2304-1

REV E 010709

MK2304S-1 Related Products

	MK2304S-1	MK2304S-1T	MK2304S-1I	MK2304S-1IT
Description	PLL Based Clock Driver, 2304 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.150 INCH, SOIC-8	PLL Based Clock Driver, 2304 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.150 INCH, SOIC-8	PLL Based Clock Driver, 2304 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.150 INCH, SOIC-8	PLL Based Clock Driver, 2304 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.150 INCH, SOIC-8
Is it lead-free?	Contains lead	Contains lead	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	SOIC	SOIC	SOIC	SOIC
package instruction	0.150 INCH, SOIC-8	SOP, SOP8,.25	SOP, SOP8,.25	SOP, SOP8,.25
Contacts	8	8	8	8
Reach Compliance Code	not_compliant	not_compliant	not_compliant	not_compliant
series	2304	2304	2304	2304
Input adjustment	STANDARD	STANDARD	STANDARD	STANDARD
JESD-30 code	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8
JESD-609 code	e0	e0	e0	e0
length	4.9 mm	4.9 mm	4.9 mm	4.9 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER
MaximumI(ol)	0.008 A	0.008 A	0.008 A	0.008 A
Humidity sensitivity level	1	1	1	1
Number of functions	1	1	1	1
Number of terminals	8	8	8	8
Actual output times	4	4	4	4
Maximum operating temperature	70 °C	70 °C	85 °C	85 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	SOP	SOP	SOP
Encapsulate equivalent code	SOP8,.25	SOP8,.25	SOP8,.25	SOP8,.25
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	240	240	240	240
power supply	3.3 V	3.3 V	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.4 ns	0.4 ns	0.4 ns	0.4 ns
Maximum seat height	1.75 mm	1.75 mm	1.75 mm	1.75 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30	30
width	3.9 mm	3.9 mm	3.9 mm	3.9 mm
minfmax	133 MHz	133 MHz	133 MHz	133 MHz

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