UPD30500S2-250 datasheet, PDF - EEWORLD Datasheet

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UPD30500S2-250: DescriptionRISC Microprocessor, 64-Bit, 250MHz, MOS, PBGA272, 29 X 29 MM, PLASTIC, BGA-272; CategoryThe embedded processor and controller Microcontrollers and processors; File Size317KB，64 Pages; ManufacturerNEC Electronics

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UPD30500S2-250 Overview

RISC Microprocessor, 64-Bit, 250MHz, MOS, PBGA272, 29 X 29 MM, PLASTIC, BGA-272

UPD30500S2-250 Parametric

Parameter Name	Attribute value
Maker	NEC Electronics
Parts packaging code	BGA
package instruction	LBGA,
Contacts	272
Reach Compliance Code	unknown
ECCN code	3A001.A.3
Address bus width	64
bit size	64
boundary scan	NO
maximum clock frequency	125 MHz
External data bus width	64
Format	FLOATING POINT
Integrated cache	YES
JESD-30 code	S-PBGA-B272
length	29 mm
low power mode	YES
Number of terminals	272
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	LBGA
Package shape	SQUARE
Package form	GRID ARRAY, LOW PROFILE
Certification status	Not Qualified
Maximum seat height	1.7 mm
speed	250 MHz
Maximum supply voltage	3.465 V
Minimum supply voltage	3.135 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	MOS
Temperature level	COMMERCIAL
Terminal form	BALL
Terminal pitch	1.27 mm
Terminal location	BOTTOM
width	29 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC

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DATA SHEET

MOS INTEGRATED CIRCUIT

PD30500

5000

64-BIT MICROPROCESSOR

DESCRIPTION

The

PD30500 (V

5000) is a high-performance, 64-bit RISC (Reduced Instruction Set Computer) type microproc-

essor employing the RISC architecture developed by MIPS

Technologies Inc.

The instructions of the V

5000 are compatible with those of the V

3000

series and V

4000

series and higher,

and completely compatible with those of the V

10000

. Therefore, present applications can be used as they are.

Detailed functions are descrided in the following manual. Be sure to read the manual when

designing your system.

• V

5000 User’s Manual (U11761E)

FEATURES

• Employs 64-bit MIPS-based RISC architecture

• High-speed processing

2-way super scalar 5-stage pipeline

5.5 SPECint95, 5.5 SPECfp95, 282 MIPS

Physical : 36 bits

Virtual

• Floating-point unit (FPU)

Sum-of-products operation instruction added

Higher operation performance than V

4000 series

: 40 bits

• High-speed translation buffer mechanism (TLB) (48 entries)

• Address space

• Primary cache memory (instruction/data: 32K bytes each)

• Secondary cache controller

• Operating frequency

Internal : 250 MHz MAX.

External : 125 MHz MAX.

External/internal multiple selectable from two to eight

• Instruction set compatible with V

3000 and V

4000 series and higher (conforms to MIPS I, II, III, and IV)

• Supply voltage: 3.3 V

±5%

APPLICATIONS

• High-performance embedded systems

• Multimedia systems

• Entry-class computers

• Image processing systems

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Document No. U12031EJ2V0DS00 (2nd edition)

Date Published May 1999 N CP(K)

Printed in Japan

The mark

shows major revised points.

1997

MIPS Technologies Inc. 1997

UPD30500S2-250 Related Products

	UPD30500S2-250	UPD30500RJ-250
Description	RISC Microprocessor, 64-Bit, 250MHz, MOS, PBGA272, 29 X 29 MM, PLASTIC, BGA-272	RISC Microprocessor, 64-Bit, 250MHz, MOS, CPGA223, 48 X 48 MM, CERAMIC, PGA-223
Parts packaging code	BGA	PGA
package instruction	LBGA,	PGA,
Contacts	272	223
Reach Compliance Code	unknown	unknown
ECCN code	3A001.A.3	3A001.A.3
Address bus width	64	64
bit size	64	64
boundary scan	NO	NO
maximum clock frequency	125 MHz	125 MHz
External data bus width	64	64
Format	FLOATING POINT	FLOATING POINT
Integrated cache	YES	YES
JESD-30 code	S-PBGA-B272	S-CPGA-P223
length	29 mm	47.24 mm
low power mode	YES	YES
Number of terminals	272	223
Maximum operating temperature	70 °C	70 °C
Package body material	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED
encapsulated code	LBGA	PGA
Package shape	SQUARE	SQUARE
Package form	GRID ARRAY, LOW PROFILE	GRID ARRAY
Certification status	Not Qualified	Not Qualified
Maximum seat height	1.7 mm	3.98 mm
speed	250 MHz	250 MHz
Maximum supply voltage	3.465 V	3.465 V
Minimum supply voltage	3.135 V	3.135 V
Nominal supply voltage	3.3 V	3.3 V
surface mount	YES	NO
technology	MOS	MOS
Temperature level	COMMERCIAL	COMMERCIAL
Terminal form	BALL	PIN/PEG
Terminal pitch	1.27 mm	2.54 mm
Terminal location	BOTTOM	PERPENDICULAR
width	29 mm	47.24 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC

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