EEWORLDEEWORLDEEWORLD

Part Number

Search

LP49-44-10.0M-15F1CE

Description
Parallel - Fundamental Quartz Crystal, 10MHz Nom, ROHS COMPLIANT PACKAGE-2
CategoryPassive components    Crystal/resonator   
File Size92KB,6 Pages
ManufacturerPletronics
Environmental Compliance  
Download Datasheet Parametric View All

LP49-44-10.0M-15F1CE Overview

Parallel - Fundamental Quartz Crystal, 10MHz Nom, ROHS COMPLIANT PACKAGE-2

LP49-44-10.0M-15F1CE Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerPletronics
package instructionROHS COMPLIANT PACKAGE-2
Reach Compliance Codecompliant
Other featuresAT-CUT CRYSTAL; BULK
Ageing5 PPM/YEAR
Crystal/Resonator TypePARALLEL - FUNDAMENTAL
Drive level1000 µW
frequency stability0.002%
frequency tolerance15 ppm
JESD-609 codee3
load capacitance44 pF
Manufacturer's serial numberLP49
Installation featuresTHROUGH HOLE MOUNT
Nominal operating frequency10 MHz
Maximum operating temperature60 °C
Minimum operating temperature
physical sizeL10.8XB4.47XH3.56 (mm)/L0.425XB0.176XH0.14 (inch)
Series resistance70 Ω
surface mountNO
Terminal surfaceMatte Tin (Sn)
LP21 / LP24 / LP49 Series
Low Profile Crystal
February 2010
• The Pletronics’ LP49 Series is a low profile
thru-hole crystal
• Bulk packaging
• 3 MHz to 70 MHz
• HC-49/US
• AT Cut Crystal
LP21 0.082 (2.10mm) high
LP24 0.100 (2.50mm) high
LP49 0.140 (3.56mm) high
Pletronics Inc. certifies this device is in accordance with the
RoHS (2002/95/EC) and WEEE (2002/96/EC) directives.
Pletronics Inc. guarantees the device does not contain the following:
Cadmium, Hexavalent Chromium, Lead (<1000 ppm), Mercury, PBB’s, PBDE’s
Weight of the Device: 0.62 grams
Moisture Sensitivity Level: 1 As defined in J-STD-020C
Second Level Interconnect code: e1, e2 or e3
Electrical Specification:
Item
Frequency Range
Calibration Frequency Tolerance
Frequency Stability over OTR
Equivalent Series Resistance
(ESR)
Min
3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Drive Level
Shunt Capacitance
Aging per year
Specified Temperature Range
Storage Temperature Range
(C0)
-
-
-5
-40
-55
Max
70
-
-
200
150
120
100
80
70
60
50
40
35
100
80
60
1
7
+5
+85
+125
Unit
MHz
ppm
ppm
Ohms
Ohms
Ohms
Ohms
Ohms
Ohms
Ohms
Ohms
Ohms
Ohms
Ohms
Ohms
Ohms
mW
pF
ppm
o
o
Condition
AT cut
at +25
o
C + 3
o
C
_
see table on page 3 for
available options
LP49
LP49/LP24
LP49/LP24
LP49/LP24
LP49/LP24
LP49/LP24/LP21
LP49/LP24/LP21
LP49/LP24/LP21
LP49/LP24/LP21
LP49/LP24/LP21
LP49/LP24/LP21
LP49/LP24/LP21
LP49/LP24/LP21
3
rd
Overtone
Fundamental
3 MHz to 4 MHz
4 MHz to 5 MHz
5 MHz to 6 MHz
6 MHz to 7 MHz
7 MHz to 9 MHz
9 MHz to 10 MHz
10 MHz to 13 MHz
13 MHz to 15 MHz
15 MHz to 27 MHz
27 MHz to 30 MHz
27 MHz to 32 MHz
32 MHz to 50 MHz
50 MHz to 70 MHz
use 10 µW for testing
Pad to Pad capacitance
at +25
o
C + 3
o
C
_
see table on page 3 for available options
C
C
Product information is current as of publication date. The product conforms
to specifications per the terms of the Pletronics limited warranty. Production
processsing does not necessarily include testing of all parameters.
Copyright © 2010, Pletronics Inc.
Question: USB bulk transfer and speed issues
Hello everyone, I recently worked on a USB host project of LPC2378+ISP1161, and encountered a few problems to ask everyone: 1. When transferring data in batches, the following situation often occurs (...
zxfen12 Embedded System
Accurate PSRR Measurement Method
[p=20, null, left][color=rgb(73, 73, 73)][font=Verdana, sans-serif][size=3][backcolor=white][b]Introduction[/b] In theory, the power supply rejection ratio (PSRR) measurement is relatively simple. A v...
wstt Analogue and Mixed Signal
Problems with communicating with PC via rapi (urgent)
This is the first time I write an interface that communicates with a PC through RAPI. I encountered the following problem. Could you please give me some advice? The lower computer continuously writes ...
杨彪 Embedded System
8052 core embedded in FPGA
The 8052 core is embedded in the FPGA, and its functions are exactly the same as using 52 directly, but the frequency can reach 200M....
unbj FPGA/CPLD
Compiler optimization is not a panacea
Some friends like to set optimization when programming with Keil or IAR, but in practice, the optimization settings will cause the program to deviate from your design ideas, and sometimes cause errors...
jim200503 stm32/stm8
Serial port number problem after USB library virtual serial port is inserted into the computer
After using the STM103USB virtual serial port program, the device is plugged into any USB port on my computer and displays the same serial port COM4. However, when I use the USB-to-serial port device ...
xinling1027 stm32/stm8

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2082  1181  2906  834  255  42  24  59  17  6 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号