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LDS3985G19R

Description
1.9V FIXED POSITIVE LDO REGULATOR, 0.25V DROPOUT, PDSO5, ROHS COMPLIANT, TSOT-23, 5 PIN
CategoryPower/power management    The power supply circuit   
File Size466KB,21 Pages
ManufacturerSTMicroelectronics
Websitehttp://www.st.com/
Download Datasheet Parametric View All

LDS3985G19R Overview

1.9V FIXED POSITIVE LDO REGULATOR, 0.25V DROPOUT, PDSO5, ROHS COMPLIANT, TSOT-23, 5 PIN

LDS3985G19R Parametric

Parameter NameAttribute value
MakerSTMicroelectronics
Parts packaging codeSOT-23
package instructionROHS COMPLIANT, TSOT-23, 5 PIN
Contacts5
Reach Compliance Codeunknown
ECCN codeEAR99
AdjustabilityFIXED
Maximum drop-back voltage 10.25 V
Nominal dropback voltage 10.15 V
Maximum absolute input voltage6 V
Maximum input voltage6 V
Minimum input voltage2.5 V
JESD-30 codeR-PDSO-G5
length2.9 mm
Maximum grid adjustment rate0.0068%
Maximum load regulation0.057%
Number of functions1
Output times1
Number of terminals5
Working temperatureTJ-Max125 °C
Working temperature TJ-Min-40 °C
Maximum output current 10.3 A
Maximum output voltage 11.975 V
Minimum output voltage 11.825 V
Nominal output voltage 11.9 V
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSOP5/6,.11,37
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
Certification statusNot Qualified
Regulator typeFIXED POSITIVE SINGLE OUTPUT LDO REGULATOR
Maximum seat height1.1 mm
surface mountYES
technologyBICMOS
Terminal formGULL WING
Terminal pitch0.95 mm
Terminal locationDUAL
Maximum voltage tolerance3%
width1.6 mm

LDS3985G19R Preview

LDS3985xx
Ultra low drop-low noise BiCMOS 300 mA volt. reg.
for use with very low ESR output capacitor
Features
Input voltage from 2.5 V to 6 V
Stable with low ESR ceramic capacitors
Ultra low dropout voltage (150 mV typ. at
300 mA load, 0.4 mV typ. at 1 mA load)
Very low quiescent current (85 µA typ. at no
load, 200 µA typ. at 300 mA load;
max 1.5 µA in OFF mode)
Guaranteed output current up to 300 mA
Wide range of output voltage:
from 1.25 V to 5.0 V
Fast turn-on time: typ. 240 µs
[C
O
= 2.2 µF, C
BYP
= 33 nF and I
O
= 1 mA]
Logic-controlled electronic shutdown
Internal current and thermal limit
Output low noise voltage 30 µV
RMS
over 10 Hz
to 100 kHz
SVR of 55 dB at 1 kHz, 50 dB at 10 kHz
Temperature range: -40 °C to 125 °C
It is stable with ceramic and high quality tantalum
capacitor. The ultra low drop voltage, low
quiescent current and low noise makes it suitable
for low power applications and in battery powered
systems. Regulator ground current increases only
slightly in dropout, further prolonging the battery
life. Shutdown logic control function is available,
this means that when the device is used as local
regulator, it is possible to put a part of the board in
standby, decreasing the total power consumption.
Typical applications are in mobile phone and
similar battery powered wireless systems,
portable information appliances.
DFN6
SOT23-5L
TSOT23-5L
Description
The LDS3985 provides up to 300 mA, from 2.5 V
to 6 V input voltage.
Table 1.
Device summary
Part number
LDS3985XX15
LDS3985XX18
LDS3985XX25
LDS3985XX28
LDS3985XX30
LDS3985XX33
Output voltage
1.5 V
1.8 V
2.5 V
2.8 V
3.0 V
3.3 V
June 2008
Rev 5
1/21
www.st.com
21
LDS3985xx
Contents
1
2
3
4
5
6
7
8
9
Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Order codes
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/21
LDS3985xx
Diagram
1
Figure 1.
Diagram
Schematic diagram
3/21
Pin configuration
LDS3985xx
2
Figure 2.
Pin configuration
Pin connections (top view for SOT and TSOT, top through view for DFN6)
SOT23-5L/TSOT23-5L
DFN6
Table 2.
Pin n° for
SOT23-5L/
TSOT23-5L
1
2
3
4
5
-
Pin description
Pin n° for
DFN6
1
5
6
4
3
2
Symbol
V
I
GND
V
INH
BYPASS
V
O
N.C.
Input voltage of the LDO
Common ground
Inhibit input voltage: ON MODE when V
INH
1.2 V, OFF MODE when V
INH
0.4 V (Do not leave floating, not internally pulled down/up)
Bypass pin: connect an external capacitor (usually 10 nF) to minimize
noise voltage
Output voltage of the LDO
Not connect
Name and function
4/21
LDS3985xx
Typical application
3
Figure 3.
Typical application
Typical application circuit
5/21
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