LF48410GC30 datasheet, PDF - EEWORLD Datasheet

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LF48410GC30: DescriptionHistogram Processor, 24-Bit, CMOS, CPGA84, CERAMIC, PGA-84; CategoryThe embedded processor and controller Microcontrollers and processors; File Size681KB，15 Pages; ManufacturerLOGIC Devices; Websitehttp://www.logicdevices.com/

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LF48410GC30 Overview

Histogram Processor, 24-Bit, CMOS, CPGA84, CERAMIC, PGA-84

LF48410GC30 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	LOGIC Devices
Parts packaging code	PGA
package instruction	PGA,
Contacts	84
Reach Compliance Code	unknown
ECCN code	3A991.A.2
Other features	ICC SPECIFIED @ 20MHZ
boundary scan	NO
maximum clock frequency	33.3 MHz
External data bus width	24
JESD-30 code	S-CPGA-P84
JESD-609 code	e0
length	29.464 mm
low power mode	NO
Humidity sensitivity level	3
Number of terminals	84
Maximum operating temperature	70 °C
Minimum operating temperature
Output data bus width	24
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	225
Certification status	Not Qualified
Maximum seat height	4.445 mm
Maximum slew rate	310 mA
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
Maximum time at peak reflow temperature	NOT SPECIFIED
width	29.464 mm
uPs/uCs/peripheral integrated circuit type	DSP PERIPHERAL, HISTOGRAM PROCESSOR

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LF48410GC30 Related Products

	LF48410GC30	LF48410GM39	LF48410GMB39	LF48410GC25	LF48410GMB30	LF48410GM30
Description	Histogram Processor, 24-Bit, CMOS, CPGA84, CERAMIC, PGA-84	Histogram Processor, 24-Bit, CMOS, CPGA84, CERAMIC, PGA-84	Histogram Processor, 24-Bit, CMOS, CPGA84, CERAMIC, PGA-84	Histogram Processor, 24-Bit, CMOS, CPGA84, CERAMIC, PGA-84	Histogram Processor, 24-Bit, CMOS, CPGA84, CERAMIC, PGA-84	Histogram Processor, 24-Bit, CMOS, CPGA84, CERAMIC, PGA-84
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	LOGIC Devices	LOGIC Devices	LOGIC Devices	LOGIC Devices	LOGIC Devices	LOGIC Devices
Parts packaging code	PGA	PGA	PGA	PGA	PGA	PGA
package instruction	PGA,	PGA,	PGA,	PGA,	PGA,	PGA,
Contacts	84	84	84	84	84	84
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown
ECCN code	3A991.A.2	3A001.A.2.C	3A001.A.2.C	3A991.A.2	3A001.A.2.C	3A001.A.2.C
Other features	ICC SPECIFIED @ 20MHZ	ICC SPECIFIED @ 20MHZ	ICC SPECIFIED @ 20MHZ	ICC SPECIFIED @ 20MHZ	ICC SPECIFIED @ 20MHZ	ICC SPECIFIED @ 20MHZ
boundary scan	NO	NO	NO	NO	NO	NO
maximum clock frequency	33.3 MHz	25.6 MHz	25.6 MHz	40 MHz	33.3 MHz	33.3 MHz
External data bus width	24	24	24	24	24	24
JESD-30 code	S-CPGA-P84	S-CPGA-P84	S-CPGA-P84	S-CPGA-P84	S-CPGA-P84	S-CPGA-P84
JESD-609 code	e0	e0	e0	e0	e0	e0
length	29.464 mm	29.464 mm	29.464 mm	29.464 mm	29.464 mm	29.464 mm
low power mode	NO	NO	NO	NO	NO	NO
Humidity sensitivity level	3	3	3	3	3	3
Number of terminals	84	84	84	84	84	84
Maximum operating temperature	70 °C	125 °C	125 °C	70 °C	125 °C	125 °C
Minimum operating temperature	-	-55 °C	-55 °C	-	-55 °C	-55 °C
Output data bus width	24	24	24	24	24	24
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA	PGA	PGA	PGA	PGA	PGA
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY
Peak Reflow Temperature (Celsius)	225	225	225	225	225	225
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	4.445 mm	4.445 mm	4.445 mm	4.445 mm	4.445 mm	4.445 mm
Maximum slew rate	310 mA	310 mA	310 mA	310 mA	310 mA	310 mA
Maximum supply voltage	5.25 V	5.5 V	5.5 V	5.25 V	5.5 V	5.5 V
Minimum supply voltage	4.75 V	4.5 V	4.5 V	4.75 V	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	MILITARY	MILITARY	COMMERCIAL	MILITARY	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG
Terminal pitch	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm
Terminal location	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	29.464 mm	29.464 mm	29.464 mm	29.464 mm	29.464 mm	29.464 mm
uPs/uCs/peripheral integrated circuit type	DSP PERIPHERAL, HISTOGRAM PROCESSOR	DSP PERIPHERAL, HISTOGRAM PROCESSOR	DSP PERIPHERAL, HISTOGRAM PROCESSOR	DSP PERIPHERAL, HISTOGRAM PROCESSOR	DSP PERIPHERAL, HISTOGRAM PROCESSOR	DSP PERIPHERAL, HISTOGRAM PROCESSOR

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