W3EG7232S265BD4ISG datasheet, PDF

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W3EG7232S265BD4ISG: DescriptionDDR DRAM Module, 32MX72, 0.75ns, CMOS, ROHS COMPLIANT, SODIMM-200; Categorystorage storage; File Size325KB，14 Pages; ManufacturerMicrosemi; Websitehttps://www.microsemi.com; Environmental Compliance

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W3EG7232S265BD4ISG Overview

DDR DRAM Module, 32MX72, 0.75ns, CMOS, ROHS COMPLIANT, SODIMM-200

W3EG7232S265BD4ISG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Microsemi
Parts packaging code	MODULE
package instruction	DIMM,
Contacts	200
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	FOUR BANK PAGE BURST
Maximum access time	0.75 ns
Other features	AUTO/SELF REFRESH
JESD-30 code	R-XDMA-N200
memory density	2415919104 bit
Memory IC Type	DDR DRAM MODULE
memory width	72
Number of functions	1
Number of ports	1
Number of terminals	200
word count	33554432 words
character code	32000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	32MX72
Package body material	UNSPECIFIED
encapsulated code	DIMM
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
self refresh	YES
Maximum supply voltage (Vsup)	2.7 V
Minimum supply voltage (Vsup)	2.3 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	NO LEAD
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED

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White Electronic Designs

W3EG7232S-xAD4

-xBD4

256MB – 32Mx72 DDR SDRAM UNBUFFERED w/PLL

FEATURES

Double-data-rate architecture

DDR200, DDR266 and DDR300

• JEDEC design speciﬁcations

Bi-directional data strobes (DQS)

Differential clock inputs (CK & CK#)

Programmable Read Latency 2,2.5 (clock)

Programmable Burst Length (2,4,8)

Programmable Burst type (sequential & interleave)

Edge aligned data output, center aligned data input

Auto and self refresh

Serial presence detect

Power supply: 2.5V ± 0.2V

JEDEC standard 200 pin SO-DIMM package

• Package height options:

AD4: 35.5 mm (1.38") and

BD4: 31.75 mm (1.25")

NOTE: Consult factory for availability of:

• RoHS compliant products

• Vendor source control options

• Industrial temperature option

* This product is subject to change without notice.

DESCRIPTION

The W3EG7232S is a 32Mx72 Double Data Rate

SDRAM memory module based on 256Mb DDR SDRAM

components. The module consists of nine 32Mx8 DDR

SDRAMs in 66 pin TSOP packages mounted on a 200

pin FR4 substrate.

Synchronous design allows precise cycle control with the

use of system clock. Data I/O transactions are possible on

both edges and Burst Lengths allow the same device to be

useful for a variety of high bandwidth, high performance

memory system applications.

OPERATING FREQUENCIES

DDR333 @CL=2.5

Clock Speed

CL-t

RCD

-t

166MHz

2.5-3-3

DDR266 @CL=2

133MHz

2-2-2

DDR266 @CL=2.5

133MHz

2.5-3-3

DDR200 @CL=2

100MHz

2-2-2

March 2007

Rev. 5

White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com

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