LH5164A/AH
FEATURES
•
8,192
×
8 bit organization
•
Access times: 80/100 ns (MAX.)
•
Low-power consumption:
Operating:
303 mW (MAX.) LH5164A/D/N
@ 80 ns
248 mW (MAX.) LH5164A/D/N/T
@ 100 ns
275 mW (MAX.) LH5164AH/HD/HN/HT
@ 100 ns
Standby:
LH5164A/D/N/T: 5.5
µW
(MAX.)
LH5164AH/HD/HN/HT:
T
A
≤
85°C: 16.5
µW
(MAX.)
T
A
≤
70°C: 5.5
µW
(MAX.)
•
Fully-static operation
•
Three-state outputs
•
Single +5 V power supply
•
TTL compatible I/O
•
Wide temperature range available
LH5164A: -10 to +70°C
LH5164AH: -40 to +85°C
•
Packages:
28-pin, 600-mil DIP
28-pin, 300-mil SK-DIP
28-pin, 450-mil SOP
28-pin, 8
×
13 mm
2
TSOP (Type I)
DESCRIPTION
The LH5164A/AH are static RAMs organized as 8,192
×
8 bits. It is fabricated using silicon-gate CMOS proc-
ess technology.
The LH5164AH is designed for wide temperature
range from -40 to +85°C.
CMOS 64K (8K
×
8) Static RAM
PIN CONNECTIONS
28-PIN DIP
28-PIN SK-DIP
28-PIN SOP
NC
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
I/O
1
I/O
2
I/O
3
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
WE
CE
2
A
8
A
9
A
11
OE
A
10
CE
1
I/O
8
I/O
7
I/O
6
I/O
5
I/O
4
5164A-1
TOP VIEW
Figure 1. Pin Connections for DIP, SK-DIP,
and SOP Packages
28-PIN TSOP (Type I)
TOP VIEW
OE
A
11
A
9
A
8
CE
2
WE
V
CC
NC
A
12
A
7
A
6
A
5
A
4
A
3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A
10
CE
1
I/O
8
I/O
7
I/O
6
I/O
5
I/O
4
GND
I/O
3
I/O
2
I/O
1
A
0
A
1
A
2
5164A-8
Figure 2. Pin Connections for TSOP Package
1
LH5164A/AH
CMOS 64K (8K
×
8) Static RAM
A
3
A
4
A
5
A
6
7
ROW ADDRESS
BUFFERS
6
5
4
ROW DECODERS
A
7
3
A
8
25
A
9
24
A
12
2
MEMORY
ARRAY
(256 x 256)
28 V
CC
14 GND
I/O
1
11
I/O
2
12
I/O
3
13
I/O
4
15
I/O
5
16
I/O
6
17
I/O
7
18
I/O
8
19
I/O
CIRCUITS
DATA CONTROL
COLUMN DECODERS
COLUMN ADDRESS
BUFFER
WE 27
OE 22
CE
2
26
CE
1
20
10
A
0
NOTE:
Pin numbers apply to 28-pin DIP, SK-DIP, or SOP.
9
A
1
8
A
2
21
A
10
23
A
11
5164A-2
Figure 3. LH5164A/AH Block Diagram
PIN DESCRIPTION
SIGNAL
PIN NAME
SIGNAL
PIN NAME
A
0
- A
12
CE
1
- CE
2
WE
OE
Address inputs
Chip Enable input
Write Enable input
Output Enable input
I/O
1
- I/O
8
V
CC
GND
NC
Data inputs and outputs
Power supply
Ground
No connection
TRUTH TABLE
CE
1
CE
2
WE
OE
MODE
I/O
1
- I/O
8
SUPPLY CURRENT
NOTE
H
X
L
L
L
NOTE:
1. X = H or L
X
L
H
H
H
X
X
L
H
H
X
X
X
L
H
Deselect
Deselect
Write
Read
Output disable
High-Z
High-Z
D
IN
D
OUT
High-Z
Standby (I
SB
)
Standby (I
SB
)
Operating (I
CC
)
Operating (I
CC
)
Operating (I
CC
)
1
1
1
2
CMOS 64K (8K
×
8) Static RAM
LH5164A/AH
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
80 ns
RATING
100 ns
RATING
UNIT
NOTE
Supply voltage
Input voltage
Operating temperature
Storage temperature
V
CC
V
IN
Topr
Tstg
-0.3 to +7.0
-0.3 to V
CC
+ 0.3
-10 to +70
-55 to +150
-0.3 to +7.0
-0.3 to V
CC
+ 0.3
-10 to +70
-40 to +85
-55 to +150
V
V
°C
°C
°C
1
1, 2
3
4
NOTES:
1. The maximum applicable voltage on any pin with respect to GND.
2. V
IN
(MIN.) = -3.0 V for pulse width
≤50
ns.
3. LH5164A/AD/AN/AT
4. LH5164AH/AHD/AHN/AHT
RECOMMENDED OPERATING CONDITIONS
1
PARAMETER
SYMBOL
MIN.
80 ns
TYP.
MAX.
MIN.
100 ns
TYP.
MAX.
UNIT
NOTE
Supply voltage
Input voltage
V
CC
V
IH
V
IL
4.5
2.2
-0.3
5.0
5.5
V
CC
+ 0.3
0.8
4.5
2.2
-0.3
5.0
5.5
V
CC
+ 0.3
0.8
V
V
V
2
NOTES:
1. T
A
= -10 to +70°C (LH5164A/AD/AN/AT), T
A
= -40 to +85°C (LH5164AH/AHD/AHN/AHT).
2. V
IN
(MIN.) = -3.0 V for pulse width
≤50
ns.
DC CHARACTERISTICS
1
(V
CC
= 5 V
±10%)
PARAMETER
SYMBOL
CONDITIONS
MIN.
MAX.
UNIT
NOTE
Input leakage current
Output leakage
current
I
LI
I
LO
V
IN
= 0 to V
CC
CE
1
= V
IH
or CE
2
= V
IL
or OE = V
IH
or WE = V
IL
V
I/O
= 0 to V
CC
CE
1
= V
IL
, V
IN
= V
IL
or V
IH
t
CYCLE
=
80 ns
CE
2
= V
IH
, Outputs open
CE
1
= V
IL
, V
IN
= V
IL
or V
IH
CE
2
= V
IH
, Outputs open
t
CYCLE
=
100 ns
-1.0
-1.0
1.0
1.0
55
45
50
µA
µA
mA
2
3
mA
Operating current
I
CC
Standby current
I
SB1
V
OL
V
OH
Output voltage
CE
1
= V
IL
, V
IN
= 0.2 V or
t
CYCLE
=
V
CC
- 0.2 V
1.0
µs
CE
2
= V
IH
, Outputs open
CE
1
= V
IH
or CE
2
= V
IL
T
A
≤
70°C
CE
2
≤
0.2 V or
CE
1
≥
V
CC
- 0.2 V
T
A
≤
85°C
I
OL
= 2.1 mA
I
OH
= -1 mA
10
5
1.0
3.0
0.4
2.4
mA
µA
µA
V
V
2, 3, 4
3, 4
NOTES:
1. T
A
= -10 to 70°C (LH5164A/AD/AN/AT), T
A
= -40 to +85°C (LH5164AH/AHD/AHN/AHT)
2. LH5164A/AD/AN/AT
3. LH5164AH/AHD/AHN/AHT
4. CE
2
should be
≥
V
CC
– 0.2 V or
≤
0.2 V when CE
1
≥
V
CC
– 0.2 V
3
LH5164A/AH
CMOS 64K (8K
×
8) Static RAM
1
AC CHARACTERISTICS
(1) READ CYCLE (V
CC
= 5 V
±10%)
PARAMETER
SYMBOL
MIN.
80 ns
MAX.
MIN.
100 ns
MAX.
UNIT
NOTE
Read cycle time
Address access time
Chip enable
access time
(CE
1
)
(CE
2
)
t
RC
t
AA
t
ACE1
t
ACE2
t
OE
t
OH
(CE
1
)
(CE
2
)
t
LZ1
t
LZ2
t
OLZ
t
HZ1
t
HZ2
t
OHZ
80
80
80
80
40
10
10
10
5
0
0
0
30
30
20
100
100
100
100
40
10
10
10
5
0
0
0
30
30
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
1
1
1
1
1
Output enable access time
Output hold time
Chip enable to
output in Low-Z
Output enable to output in
Low-Z
Chip enable to
output in High-Z
(CE
1
)
(CE
2
)
Output disable to output in
High-Z
(2) WRITE CYCLE (V
CC
= 5 V
±10%)
PARAMETER
SYMBOL
MIN.
80 ns
MAX.
MIN.
100 ns
MAX.
UNIT
NOTE
Write cycle time
Chip enable to end of write
Address valid to end of write
Address setup time
Write pulse width
Write recovery time
Data valid to end of write
Data hold time
Output active from end of write
WE to output in High-Z
OE to output in High-Z
t
WC
t
CW
t
AW
t
AS
t
WP
t
WR
t
DW
t
DH
t
OW
t
WZ
t
OHZ
80
70
70
0
60
0
40
0
10
0
0
30
20
100
80
80
0
60
0
40
0
10
0
0
30
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2
2
2
NOTES:
1. T
A
= -10 to +70°C (LH5164A/AD/AN/AT), T
A
= -40 to +85°C (LH5164AH/AHD/AHN/AHT)
2. Active output to high-impedance and high-impedance to output active tests specified for a
±200
mV transition
from steady state levels into the test load.
AC TEST CONDITIONS
PARAMETER
MODE
NOTE
Input voltage amplitude
Input rise/fall time
Timing reference level
Output load conditions
0.6 to 2.4 V
10 ns
1.5 V
1TTL + C
L
(100 pF)
1
NOTE:
1. Includes scope and jig capacitance.
4
CMOS 64K (8K
×
8) Static RAM
LH5164A/AH
CAPACITANCE
1
(T
A
= 25°C, f = 1 MHz)
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Input capacitance
Input/output capacitance
C
IN
C
I/O
V
IN
= 0 V
V
I/O
= 0 V
7
10
pF
pF
NOTE:
1. This parameter is sampled and not production tested.
DATA RETENTION CHARACTERISTICS
1
PARAMETER
SYMBOL
CONDITIONS
MIN.
MAX.
UNIT
NOTE
Data retention voltage
V
CCDR
CE
2
≤
0.2 V or
CE
1
≥
V
CCDR
- 0.2 V
V
CCDR
= 3 V,
CE
2
≤
0.2 V or
CE
1
≥
V
CCDR
- 0.2 V
T
A
=
25°C
T
A
=
40°C
T
A
=
25°C
T
A
=
70°C
2.0
5.5
0.2
0.4
0.6
V
µA
µA
µA
µA
µA
µA
ns
ns
2
2, 3
2, 3
2, 3
2, 4
2, 4
2, 4
5
Data retention current
I
CCDR
V
CCDR
= 3 V,
CE
2
≤
0.2 V or
CE
1
≥
V
CCDR
- 0.2 V
0.2
0.6
1.5
Chip disable to data retention
Recovery time
t
CDR
t
R
0
t
RC
NOTES:
1. T
A
= -10 to +70°C (LH5164A/AD/AN/AT), T
A
= -40 to +85°C (LH5164AH/AHD/AHN/AHT)
2. CE
2
should be
≥
V
CCDR
- 0.2 V or
≤
0.2 V when CE
1
≥
V
CCDR
– 0.2 V
3. LH5164A/AD/AN/AT
4. LH5164AH/AHD/AHN/AHT
5. t
RC
= Read cycle time
5
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