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HD74HC592FP

Description
HC/UH SERIES, ASYN POSITIVE EDGE TRIGGERED 8-BIT UP BINARY COUNTER, PDSO16, FP-16DA
Categorylogic    logic   
File Size51KB,7 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Environmental Compliance  
Download Datasheet Parametric View All

HD74HC592FP Overview

HC/UH SERIES, ASYN POSITIVE EDGE TRIGGERED 8-BIT UP BINARY COUNTER, PDSO16, FP-16DA

HD74HC592FP Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerRenesas Electronics Corporation
Parts packaging codeSOIC
package instructionFP-16DA
Contacts16
Reach Compliance Codeunknown
ECCN codeEAR99
Other featuresREGISTERED INPUTS
Counting directionUP
seriesHC/UH
JESD-30 codeR-PDSO-G16
length10.06 mm
Load/preset inputYES
Logic integrated circuit typeBINARY COUNTER
Operating modeASYNCHRONOUS
Humidity sensitivity level1
Number of digits8
Number of functions1
Number of terminals16
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)375 ns
Certification statusNot Qualified
Maximum seat height2.2 mm
Maximum supply voltage (Vsup)6 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)4.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typePOSITIVE EDGE
width5.5 mm

HD74HC592FP Preview

HD74HC592
8-bit Register/Binary Counter
ADE-205-513 (Z)
1st. Edition
Sep. 2000
Description
The HD74HC592 consists of a parallel input, 8-bit storage register feeding an 8-bit binary counter. Both
the register and the counter have individual positive edge-triggered clocks. In addition, the counter has
direct load and clear functions. Expansion is easily accomplished by connecting
RCO
of the first stage to
the count enable of the second stage, etc.
Features
High Speed Operation: t
pd
(CCK to
RCO)
= 24 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: I
CC
(static) = 4 µA max (Ta = 25°C)
Function Table
Inputs
RCK
X
X
CLoad
L
H
H
H
X
X
X
H
H
H
CCLR
H
L
H
H
H
H
H
CCKEN
X
X
X
X
L
L
H
X
CCK
X
X
X
X
Function
Regiater data loaded into counter
Counter clear
Input data A to H stored into register
No change in register
Count up
No count
No cont
RCO
= QA’•QB’•QC’•QD’•QE’•QF’•QG’•QH’• (CCKEN) (QA’ to QH’: Output of Internal Counter)
HD74HC592
Pin Arrangement
B 1
C 2
D 3
E 4
F 5
G 6
H 7
GND 8
(Top view)
16 V
CC
15 A
14
C Load
13 RCK
12
CCKEN
11 CCK
10
CCLR
9
RCO
2
Logic Diagram
CCKEN
CLOAD
CCLR
CLR
RCK
CCK
CCK
CCK
G
H
D
RCK
RCK
RCK
D
C
E
B
A
F
D
D
D
D
D
D
D
RCK
RCK
RCK
RCK
RCK
RCK
RCK
RCK
RCK
RCK
RCK
RCK
LD
RCK
LD
CLR
CCK
CCK
T
Q
D
LD
CLR
CCK
CCK
T
D
Q
LD
CLR
CCK
CCK
T
D
Q
LD
CLR
CCK
CCK
T
D
Q
LD
CLR
CCK
CCK
T
D
Q
LD
CLR
CCK
CCK
T
D
Q
LD
CLR
CCK
CCK
T
D
Q
HD74HC592
LD
CLR
CCK
CCK
T
D
Q
RCO
HD74HC592
DC Characteristics
Ta = 25°C
Item
Input voltage
Symbol
V
IH
Ta = –40 to
+85°C
Max
0.5
1.35
1.8
0.1
0.1
0.1
0.33
0.33
±1.0
40
µA
µA
I
OL
= 4 mA
I
OL
= 5.2 mA
Vin = V
CC
or GND
Vin = V
CC
or GND, Iout = 0
µA
V
I
OH
= –4 mA
I
OH
= –5.2 mA
Vin = V
IH
or V
IL
I
OL
= 20
µA
V
Vin = V
IH
or V
IL
I
OH
= –20
µA
V
Unit
V
Test Conditions
V
CC
(V) Min Typ Max Min
2.0
4.5
6.0
1.5 —
3.15 —
4.2 —
0.5
1.5
3.15
4.2
V
IL
2.0
4.5
6.0
1.35 —
1.8
1.9
4.4
5.9
4.13
5.63
Output voltage
V
OH
2.0
4.5
6.0
4.5
6.0
1.9 2.0 —
4.4 4.5 —
5.9 6.0 —
4.18 —
5.68 —
V
OL
2.0
4.5
6.0
4.5
6.0
0.0 0.1
0.0 0.1
0.0 0.1
0.26 —
0.26 —
±0.1
4.0
Input current
Quiescent supply
current
Iin
I
CC
6.0
6.0
4
HD74HC592
AC Characteristics
(C
L
= 50 pF, Input t
r
= t
f
= 6 ns)
Ta = 25°C
Item
Maximum clock
frequency
Symbol
f
max
Ta = –40 to
+85°C
Max
4
20
24
250
50
43
250
50
43
250
50
43
375
75
64
95
19
16
10
pF
ns
ns
CCK to RCK
ns
CCKEN
to CCK
ns
CCLR
to CCK
ns
ns
RCK to
RCO
ns
CCLR
to
RCO
ns
C Load
to
RCO
ns
CCK to
RCO
Unit
MHz
Test Conditions
V
CC
(V) Min Typ Max Min
2.0
4.5
6.0
80
16
14
24
27
26
29
8
5
25
29
Propagation delay t
PLH
time
t
PHL
2.0
4.5
6.0
200 —
40
34
t
PLH
t
PHL
2.0
4.5
6.0
200 —
40
34
t
PLH
2.0
4.5
6.0
200 —
40
34
t
PLH
t
PHL
2.0
4.5
6.0
300 —
60
51
75
15
13
10
100
20
17
125
25
21
125
25
21
250
50
43
Pulse width
t
w
2.0
4.5
6.0
Removal time
t
rem
2.0
4.5
6.0
100 —
20
17
12
Setup time
t
su
2.0
4.5
6.0
2.0
4.5
6.0
100 —
20
17
0
200 —
40
34
14
5
5
Output rise/fall
time
t
TLH
t
THL
2.0
4.5
6.0
Input capacitance
Cin
5

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