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K3N5C1000F-GC12

Description
MASK ROM, 1MX16, 120ns, CMOS, PDSO44, 0.600 INCH, SOP-44
Categorystorage    storage   
File Size52KB,3 Pages
ManufacturerSAMSUNG
Websitehttp://www.samsung.com/Products/Semiconductor/
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K3N5C1000F-GC12 Overview

MASK ROM, 1MX16, 120ns, CMOS, PDSO44, 0.600 INCH, SOP-44

K3N5C1000F-GC12 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerSAMSUNG
Parts packaging codeSOIC
package instructionSOP, SOP44,.63
Contacts44
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum access time120 ns
Spare memory width8
JESD-30 codeR-PDSO-G44
JESD-609 codee0
length28.5 mm
memory density16777216 bit
Memory IC TypeMASK ROM
memory width16
Number of functions1
Number of terminals44
word count1048576 words
character code1000000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize1MX16
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP44,.63
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Maximum seat height3.1 mm
Maximum standby current0.00005 A
Maximum slew rate0.07 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width12.6 mm

K3N5C1000F-GC12 Preview

K3N5C1000F-D(G)C
16M-Bit (2Mx8 /1Mx16) CMOS MASK ROM
FEATURES
Switchable organization
2,097,152 x 8(byte mode)
1,048,576 x 16(word mode)
Fast access time
Random Access
100ns(Max.) : C
L
=50pF
120ns(Max.) : C
L
=100pF
Supply voltage : single +5V
Current consumption
Operating : 70mA(Max.)
Standby : 50µA(Max.)
Fully static operation
All inputs and outputs TTL compatible
Three state outputs
Package
-. K3N5C1000F-DC : 42-DIP-600
-. K3N5C1000F-GC : 44-SOP-600
CMOS MASK ROM
GENERAL DESCRIPTION
The K3N5C1000F-D(G)C is a fully static mask programmable
ROM fabricated using silicon gate CMOS process technology,
and is organized either as 2,097,152 x 8 bit(byte mode) or as
1,048,576 x 16 bit(word mode) depending on BHE voltage
level.(See mode selection table)
This device operates with a 5V single power supply, and all
inputs and outputs are TTL compatible.
Because of its asynchronous operation, it requires no external
clock assuring extremely easy operation.
It is suitable for use in program memory of microprocessor, and
data memory, character generator.
The K3N5C1000F-DC is packaged in a 42-DIP and the
K3N5C1000F-GC in a 44-SOP.
FUNCTIONAL BLOCK DIAGRAM
A
19
.
.
.
.
.
.
.
.
A
0
X
BUFFERS
AND
DECODER
PIN CONFIGURATION
MEMORY CELL
MATRIX
(1,048,576x16/
2,097,152x8)
A
18
A
17
A
7
A
6
A
5
1
2
3
4
5
6
7
8
9
42 A
19
41 A
8
40 A
9
39 A
10
38 A
11
37 A
12
36 A
13
35 A
14
34 A
15
33 A
16
32 BHE
N.C 1
A
18
A
17
A
7
A
6
A
5
A
4
A
3
A
2
2
3
4
5
6
7
8
9
44 N.C
43 A
19
42 A
8
41 A
9
40 A
10
39 A
11
38 A
12
37 A
13
36 A
14
35 A
15
34 A
16
33 BHE
32 V
SS
31 Q
15
/A
-1
30 Q
7
29 Q
14
28 Q
6
27 Q
13
26 Q
5
25 Q
12
24 Q
4
23 V
CC
Y
BUFFERS
AND
DECODER
SENSE AMP.
DATA OUT
BUFFERS
A
4
A
3
A
2
A
1
A
-1
CE
OE
BHE
CONTROL
LOGIC
. . .
Q
0
/Q
8
Q
7
/Q
15
A
0
10
CE 11
V
SS
12
OE 13
Q
0
14
Q
8
15
Q
1
16
Q
9
17
Q
2
18
Q
10
19
A
1
10
DIP
Pin Name
A
0
- A
19
Q
0
- Q
14
Q
15
/A
-1
BHE
CE
OE
V
CC
V
SS
N.C
Pin Function
Address Inputs
Data Outputs
Output 15(Word mode)/
LSB Address(Byte mode)
Word/Byte selection
Chip Enable
Output Enable
Power ( +5V)
Ground
No Connection
Q
3
20
Q
11
21
A
0
11
31 V
SS
CE 12
30 Q
15
/A
-1
V
SS
13
29 Q
7
OE 14
28 Q
14
Q
0
15
27 Q
6
Q
8
16
26 Q
13
Q
1
17
25 Q
5
Q
9
18
24 Q
12
Q
2
19
23 Q
4
Q
10
20
22 V
CC
Q
3
21
Q
11
22
SOP
K3N5C1000F-DC
K3N5C1000F-GC
K3N5C1000F-D(G)C
ABSOLUTE MAXIMUM RATINGS
Item
Voltage on Any Pin Relative to V
SS
Temperature Under Bias
Storage Temperature
Symbol
V
IN
T
BIAS
T
Stg
Rating
CMOS MASK ROM
Unit
V
°C
°C
-0.3 to +7.0
-10 to +85
-55 to +150
NOTE
: Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the
conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
RECOMMENDED OPERATING CONDITIONS
(Voltage reference to V
SS
, T
A
=0 to 70°C)
Item
Supply Voltage
Supply Voltage
Symbol
V
CC
V
SS
Min
4.5
0
Typ
5.0
0
Max
5.5
0
Unit
V
V
DC CHARACTERISTICS
Parameter
Operating Current
Standby Current(TTL)
Standby Current(CMOS)
Input Leakage Current
Output Leakage Current
Input High Voltage, All Inputs
Input Low Voltage, All Inputs
Output High Voltage Level
Output Low Voltage Level
Symbol
I
CC
I
SB1
I
SB2
I
LI
I
LO
V
IH
V
IL
V
OH
V
OL
I
OH
= -400µA
I
OL
= 2.1mA
Test Conditions
Cycle=5MHz, all outputs open
CE=OE=V
IL
, V
IN
=0.6V to 2.4V (AC Test Condition)
CE=V
IH
, all outputs open
CE=V
CC
, all outputs open
V
IN
=0 to V
CC
V
OUT
=0 to V
CC
Min
-
-
-
-
-
2.2
-0.3
2.4
-
Max
70
1
50
10
10
V
CC
+0.3
0.8
-
0.4
Unit
mA
mA
µA
µA
µA
V
V
V
V
NOTE
: Minimum DC Voltage(V
IL
) is -0.3V an input pins. During transitions, this level may undershoot to -2.0V for periods <20ns.
Maximum DC voltage on input pins(V
IH
) is V
CC
+0.3V which, during transitions, may overshoot to V
CC
+2.0V for periods <20ns.
MODE SELECTION
CE
H
L
L
OE
X
H
L
L
Input
Operating
BHE
X
X
H
Q
15
/A
-1
X
X
Output
Mode
Standby
Operating
Operating
Data
High-Z
High-Z
Q
0
~Q
15
: Dout
Q
0
~Q
7
: Dout
Q
8
~Q
14
: Hi-Z
Power
Standby
Active
Active
Active
CAPACITANCE
(T
A
=25°C, f=1.0MHz)
Item
Output Capacitance
Input Capacitance
Symbol
C
OUT
C
IN
Test Conditions
V
OUT
=0V
V
IN
=0V
Min
-
-
Max
12
12
Unit
pF
pF
NOTE
: Capacitance is periodically sampled and not 100% tested.
K3N5C1000F-D(G)C
TEST CONDITIONS
Item
Input Pulse Levels
Input Rise and Fall Times
Input and Output timing Levels
Output Loads
Value
CMOS MASK ROM
AC CHARACTERISTICS
(T
A
=0°C to +70°C, V
CC
=5V±10%, unless otherwise noted.)
0.6V to 2.4V
10ns
0.8V and 2.0V
1 TTL Gate and C
L
=50pF or 100pF
READ CYCLE
Item
Read Cycle Time
Chip Enable Access Time
Address Access Time
Output Enable Access Time
Output or Chip Disable to
Output High-Z
Output Hold from Address Change
Sym-
bol
t
RC
t
ACE
t
AA
t
OE
t
DF
t
OH
0
K3N5C1000F-D(G)C10
(C
L
=50pF)
Min
100
100
100
50
20
0
Max
K3N5C1000F-D(G)C12
(C
L
=100pF)
Min
120
120
120
60
20
0
Max
K3N5C1000F-D(G)C15
(C
L
=100pF)
Min
150
150
150
70
30
Max
ns
ns
ns
ns
ns
ns
Unit
TIMING DIAGRAM
READ
ADD
A
0
~A
19
A
-1(*1)
t
ACE
ADD1
t
RC
ADD2
t
DF(*3)
CE
t
OE
t
AA
OE
t
OH
D
OUT
D
0
~D
7
D
8
~D
15(*2)
VALID DATA
VALID DATA
NOTES :
*1. Byte Mode only. A
-1
is Least Significant Bit Address.(BHE = V
IL
)
*2. Word Mode only.(BHE = V
IH
)
*3. t
DF
is defined as the time at which the outputs achieve the open circuit condition and is not referenced to V
OH
or V
OL
level.

K3N5C1000F-GC12 Related Products

K3N5C1000F-GC12 K3N5C1000F-DC12 K3N5C1000F-GC10 K3N5C1000F-DC10
Description MASK ROM, 1MX16, 120ns, CMOS, PDSO44, 0.600 INCH, SOP-44 MASK ROM, 1MX16, 120ns, CMOS, PDIP42, 0.600 INCH, DIP-42 MASK ROM, 1MX16, 100ns, CMOS, PDSO44, 0.600 INCH, SOP-44 MASK ROM, 1MX16, 100ns, CMOS, PDIP42, 0.600 INCH, DIP-42
Is it lead-free? Contains lead Contains lead Contains lead Contains lead
Is it Rohs certified? incompatible incompatible incompatible incompatible
Maker SAMSUNG SAMSUNG SAMSUNG SAMSUNG
Parts packaging code SOIC DIP SOIC DIP
package instruction SOP, SOP44,.63 DIP, DIP42,.6 SOP, SOP44,.63 DIP, DIP42,.6
Contacts 44 42 44 42
Reach Compliance Code compliant compliant compliant compliant
ECCN code EAR99 EAR99 EAR99 EAR99
Maximum access time 120 ns 120 ns 100 ns 100 ns
Spare memory width 8 8 8 8
JESD-30 code R-PDSO-G44 R-PDIP-T42 R-PDSO-G44 R-PDIP-T42
JESD-609 code e0 e0 e0 e0
length 28.5 mm 52.42 mm 28.5 mm 52.42 mm
memory density 16777216 bit 16777216 bit 16777216 bit 16777216 bit
Memory IC Type MASK ROM MASK ROM MASK ROM MASK ROM
memory width 16 16 16 16
Number of functions 1 1 1 1
Number of terminals 44 42 44 42
word count 1048576 words 1048576 words 1048576 words 1048576 words
character code 1000000 1000000 1000000 1000000
Operating mode ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
Maximum operating temperature 70 °C 70 °C 70 °C 70 °C
organize 1MX16 1MX16 1MX16 1MX16
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP DIP SOP DIP
Encapsulate equivalent code SOP44,.63 DIP42,.6 SOP44,.63 DIP42,.6
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE IN-LINE SMALL OUTLINE IN-LINE
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
power supply 5 V 5 V 5 V 5 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 3.1 mm 5.08 mm 3.1 mm 5.08 mm
Maximum standby current 0.00005 A 0.00005 A 0.00005 A 0.00005 A
Maximum slew rate 0.07 mA 0.07 mA 0.07 mA 0.07 mA
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V
surface mount YES NO YES NO
technology CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form GULL WING THROUGH-HOLE GULL WING THROUGH-HOLE
Terminal pitch 1.27 mm 2.54 mm 1.27 mm 2.54 mm
Terminal location DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 12.6 mm 15.24 mm 12.6 mm 15.24 mm
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