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V54C316162VT-6

Description
1MX16 SYNCHRONOUS DRAM, 5.5ns, PDSO50, 0.400 INCH, PLASTIC, TSOP2-50
Categorystorage    storage   
File Size124KB,21 Pages
ManufacturerMosel Vitelic Corporation ( MVC )
Websitehttp://www.moselvitelic.com
Download Datasheet Parametric Compare View All

V54C316162VT-6 Overview

1MX16 SYNCHRONOUS DRAM, 5.5ns, PDSO50, 0.400 INCH, PLASTIC, TSOP2-50

V54C316162VT-6 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMosel Vitelic Corporation ( MVC )
Parts packaging codeTSOP2
package instructionTSOP2, TSOP50,.46,32
Contacts50
Reach Compliance Codeunknown
access modeDUAL BANK PAGE BURST
Maximum access time5.5 ns
Other featuresAUTO/SELF REFRESH
Maximum clock frequency (fCLK)166 MHz
I/O typeCOMMON
interleaved burst length1,2,4,8
JESD-30 codeR-PDSO-G50
JESD-609 codee0
length20.95 mm
memory density16777216 bit
Memory IC TypeSYNCHRONOUS DRAM
Number of functions1
Number of ports1
Number of terminals50
word count1048576 words
character code1000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize1MX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Encapsulate equivalent codeTSOP50,.46,32
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3 V
Certification statusNot Qualified
refresh cycle4096
Maximum seat height1.2 mm
Continuous burst length1,2,4,8,FP
Maximum standby current0.002 A
Maximum slew rate0.15 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.16 mm
MOSEL VITELIC
V54C316162V
200/183/166 MHz 3.3 VOLT, 4K REFRESH
ULTRA HIGH PERFORMANCE
1M X 16 SDRAM 2 BANKS X 512Kbit X 16
V54C316162V
Clock Frequency (t
CK
)
Latency
Cycle Time (t
CK
)
Access Time (t
AC
)
-5
200
3
5
5
-55
183
3
5.5
5.3
-6
166
3
6
5.5
Unit
MHz
clocks
ns
ns
I
JEDEC Standard 3.3V Power Supply
I
The V54C316162V is ideally suited for high per-
formance graphics peripheral applications
I
Single Pulsed RAS Interface
I
Programmable CAS Latency: 2, 3
I
All Inputs are sampled at the positive going edge
of clock
I
Programmable Wrap Sequence: Sequential or
Interleave
I
Programmable Burst Length: 1, 2, 4, 8 and Full
Page for Sequential and 1, 2, 4, 8 for Interleave
I
UDQM & LDQM for byte masking
I
Auto & Self Refresh
I
4K Refresh Cycles/64 ms
I
Burst Read with Single Write Operation
Features
Description
The V54C316162V is a 16,777,216 bits synchro-
nous high data rate DRAM organized as 2 x
524,288 words by 16 bits. The device is designed to
comply with JEDEC standards set for synchronous
DRAM products, both electrically and mechanically.
Synchronous design allows precise cycle control
with the system clock. The CAS latency, burst
length and burst sequence must be programmed
into device prior to access operation.
V54C316162V Rev. 2.6 April 2001
1

V54C316162VT-6 Related Products

V54C316162VT-6 V54C316162VT-55 V54C316162VT-5
Description 1MX16 SYNCHRONOUS DRAM, 5.5ns, PDSO50, 0.400 INCH, PLASTIC, TSOP2-50 1MX16 SYNCHRONOUS DRAM, 5.3ns, PDSO50, 0.400 INCH, PLASTIC, TSOP2-50 1MX16 SYNCHRONOUS DRAM, 5ns, PDSO50, 0.400 INCH, PLASTIC, TSOP2-50
Is it Rohs certified? incompatible incompatible incompatible
Parts packaging code TSOP2 TSOP2 TSOP2
package instruction TSOP2, TSOP50,.46,32 TSOP2, TSOP50,.46,32 TSOP2, TSOP50,.46,32
Contacts 50 50 50
Reach Compliance Code unknown unknown unknown
access mode DUAL BANK PAGE BURST DUAL BANK PAGE BURST DUAL BANK PAGE BURST
Maximum access time 5.5 ns 5.3 ns 5 ns
Other features AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH
Maximum clock frequency (fCLK) 166 MHz 183 MHz 200 MHz
I/O type COMMON COMMON COMMON
interleaved burst length 1,2,4,8 1,2,4,8 1,2,4,8
JESD-30 code R-PDSO-G50 R-PDSO-G50 R-PDSO-G50
JESD-609 code e0 e0 e0
length 20.95 mm 20.95 mm 20.95 mm
memory density 16777216 bit 16777216 bit 16777216 bit
Memory IC Type SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM
Number of functions 1 1 1
Number of ports 1 1 1
Number of terminals 50 50 50
word count 1048576 words 1048576 words 1048576 words
character code 1000000 1000000 1000000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 70 °C 70 °C 70 °C
organize 1MX16 1MX16 1MX16
Output characteristics 3-STATE 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSOP2 TSOP2 TSOP2
Encapsulate equivalent code TSOP50,.46,32 TSOP50,.46,32 TSOP50,.46,32
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
power supply 3.3 V 3.3 V 3.3 V
Certification status Not Qualified Not Qualified Not Qualified
refresh cycle 4096 4096 4096
Maximum seat height 1.2 mm 1.2 mm 1.2 mm
Continuous burst length 1,2,4,8,FP 1,2,4,8,FP 1,2,4,8,FP
Maximum standby current 0.002 A 0.002 A 0.002 A
Maximum slew rate 0.15 mA 0.155 mA 0.16 mA
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 3 V 3 V 3 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V
surface mount YES YES YES
technology CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form GULL WING GULL WING GULL WING
Terminal pitch 0.8 mm 0.8 mm 0.8 mm
Terminal location DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 10.16 mm 10.16 mm 10.16 mm
Maker Mosel Vitelic Corporation ( MVC ) - Mosel Vitelic Corporation ( MVC )
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