21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT377T
OCTAL D FLIP-FLOP with CLOCK ENABLE
PI74FCT377T
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
Product Features:
• The PI74FCT377T is pin compatible with bipolar FAST™
Series at a higher speed and lower power
consumption
• TTL input and output levels
• Octal D flip-flops with Clock Enable
• Extremely low static power
• Hysteresis on all inputs
• Industrial operating temperature range: –40°C to +85°C
• Packages available:
– 20-pin 173 mil wide plastic TSSOP (L)
– 20-pin 300 mil wide plastic DIP (P)
– 20-pin 150 mil wide plastic QSOP (Q)
– 20-pin 150 mil wide plastic TQSOP (R)
– 20-pin 300 mil wide plastic SOIC (S)
Fast CMOS Octal D Flip-Flop
with Clock Enable
Product Description:
Pericom Semiconductor’s PI74FCT series of logic circuits are pro-
duced in the Company’s advanced 0.6/0.8 micron CMOS technology,
achieving industry leading speed grades.
The PI74FCT377T is an 8-bit wide octal designed with eight edge-
triggered D-type flip-flops with individual D inputs and O outputs.
When Clock Enable (CE) is LOW, the common buffered Clock
(CP) loads all flip-flops simultaneously. The register is fully edge-
triggered. D input state, one setup time before the LOW-to-HIGH
clock transition, is transferred to the corresponding flip-flop’s O
output. The CE input must be stable only one setup time prior to
the LOW-to-HIGH transition for predictable operation.
Logic Block Diagram
D
0
CE
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
CP
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
Product Pin Configuration
CE
O
0
D
0
D
1
O
1
O
2
D
2
D
3
O
3
GND
1
20
2
19
3
20-PIN
18
L20
17
4
P20
16
5
Q20
6
15
R20
7
14
S20
8
13
9
12
10
11
Product Pin Description
Pin Name
CE
CP
D
0
-D
7
O
0
-O
7
GND
V
CC
Truth Table
(1)
Vcc
O
7
D
7
D
6
O
6
O
5
D
5
D
4
O
4
CP
Inputs
Outputs
Description
Mode
CP
CE
D
N
O
N
Clock Enable (Active LOW)
Load "1"
↑
l
h
H
Clock Pulse Input
Load "0"
↑
l
l
L
Data Inputs
Hold
↑
h
X
NC
Data Outputs
(Do Nothing)
H
H
X
NC
Ground
Power
1. H = HIGH Voltage Level
h = HIGH Voltage Level one setup time
prior to the LOW-to-HIGH Clock
Transition
L = LOW Voltage Level
l = LOW Voltage Level one setup time
prior to the LOW-to-HIGH Clock
Transition
X = Don't Care
NC = No Change
↑
= LOW-to-HIGH Clock Transition
1
PS2017A 03/11/96
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT377T
OCTAL D FLIP-FLOP with CLOCK ENABLE
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .................................................................... –65°C to +150°C
Ambient Temperature with Power Applied .....................................-40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .............. –0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) ........... –0.5V to +7.0V
DC Input Voltage ............................................................................ –0.5V to +7.0V
DC Output Current ..................................................................................... 120 mA
Power Dissipation ..........................................................................................0.5W
Note:
Stresses greater than those listed under
MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions above those
indicated in the operational sections of this
specification is not implied. Exposure to
absolute maximum rating conditions for
extended periods may affect reliability.
DC Electrical Characteristics
(Over the Operating Range, T
A
= –40°C to +85°C, V
CC
= 5V ± 5%)
Parameters Description
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
V
IK
I
OS
I
OFF
V
H
Output HIGH Voltage
Output LOW Current
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Clamp Diode Voltage
Short Circuit Current
Power Down Disable
Input Hysteresis
Test Conditions
(1)
V
CC
= Min., V
IN
= V
IH
or V
IL
V
CC
= Min., V
IN
= V
IH
or V
IL
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= Min., I
IN
= –18 mA
V
CC
= Max.
(3)
, V
OUT
= GND
V
CC
= GND, V
OUT
= 4.5V
–60
—
V
IN
= V
CC
V
IN
= GND
–0.7
–120
—
200
100
I
OH
= –15.0 mA
I
OL
= 64 mA
2.0
0.8
1
–1
–1.2
Min.
2.4
Typ
(2)
3.0
0.3
0.55
Max.
Units
V
V
V
V
µA
µA
V
mA
µA
mV
Capacitance
(T
A
= 25°C, f = 1 MHz)
Parameters
(4)
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
V
IN
= 0V
V
OUT
= 0V
Typ
6
8
Max.
10
12
Units
pF
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
2
PS2017A 03/11/96
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT377T
OCTAL D FLIP-FLOP with CLOCK ENABLE
Power Supply Characteristics
Parameters Description
I
CC
∆I
CC
I
CCD
Quiescent Power
Supply Current
Supply Current per
Input @ TTL HIGH
Supply Current per
Input per MHz
(4)
V
CC
= Max.
V
CC
= Max.
V
CC
= Max., Outputs Open
CE = GND
One Input Toggling
50% Duty Cycle
V
CC
= Max., Outputs Open
f
CP
= 10 MH
Z
, 50% Duty Cycle
CE = GND
50% Duty Cycle
One Bit toggling at f
I
= 5 MH
Z
V
CC
= Max., Outputs Open
f
CP
= 10 MH
Z
, 50% Duty Cycle
CE = GND
Eight Bits toggling at f
I
= 2.5 MH
Z
50% Duty Cycle
Test Conditions
(1)
V
IN
= GND
or V
CC
V
IN
= 3.4V
(3)
V
IN
= V
CC
V
IN
= GND
Min.
Typ
(2)
0.1
0.5
0.15
Max.
500
2.0
0.25
Units
µA
mA
mA/
MHz
I
C
Total Power Supply
Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
1.57
2.0
3.8
6.0
3.5
(5)
5.5
(5)
7.3
(5)
16.3
(5)
mA
Notes:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. I
C
=I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆
I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
I
N
I
)
I
CC
= Quiescent Current
∆
I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
I
= Input Frequency
N
I
= Number of Inputs at f
I
(All currents are in milliamps and all frequencies are in megahertz.)
Switching Characteristics over Operating Range
377T
Com.
377AT
Com.
Max
Min
Max
Min
377CT
Com.
Max
Min
377DT
Com.
Max
Unit
Parameters
t
PLH
t
PHL
t
SU
t
H
t
SU
t
H
t
W
Description
Propagation Delay
CP to O
N
Setup Time, HIGH or LOW
Dn to CP
Hold Time, HIGH or LOW
Dn to CP
Setup Time HIGH or LOW
CE to CP
Hold Time HIGH or LOW
CE to CP
Clock Pulse Width
(3)
HIGH or LOW
Conditions
(1)
C
L
= 50 pF
R
L
= 500Ω
Min
2.0
2.5
2.0
4.0
1.5
7.0
13.0
—
—
—
—
—
2.0
2.0
1.5
3.5
1.5
6.0
7.2
—
—
—
—
—
2.0
2.0
1.5
3.5
1.5
6.0
5.2
—
—
—
—
—
2.0
2.0
1.5
2.0
1.5
3.0
4.5
—
—
—
—
—
ns
ns
ns
ns
ns
ns
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter guaranteed but not production tested.
3
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