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ADG602BRMZ

Description
1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO8, ROHS COMPLIANT, MO-187AA, MSOP-8
CategoryAnalog mixed-signal IC    The signal circuit   
File Size1MB,13 Pages
ManufacturerRochester Electronics
Websitehttps://www.rocelec.com/
Environmental Compliance  
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1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO8, ROHS COMPLIANT, MO-187AA, MSOP-8

ADG602BRMZ Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerRochester Electronics
Parts packaging codeTSSOP
package instructionTSSOP,
Contacts8
Reach Compliance Codeunknown
Other featuresCAN ALSO OPERATE WITH 2.7V TO 5.5V SINGLE SUPPLY
Analog Integrated Circuits - Other TypesSPST
JESD-30 codeS-PDSO-G8
JESD-609 codee3
length3 mm
Humidity sensitivity level1
Maximum negative supply voltage (Vsup)-5.5 V
Negative supply voltage minimum (Vsup)-2.7 V
Nominal Negative Supply Voltage (Vsup)-5 V
Number of channels1
Number of functions1
Number of terminals8
Nominal off-state isolation60 dB
On-state resistance matching specifications0.35 Ω
Maximum on-state resistance (Ron)2.5 Ω
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeSQUARE
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)5 V
surface mountYES
Maximum disconnect time75 ns
Maximum connection time120 ns
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width3 mm

ADG602BRMZ Preview

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2 Ω, CMOS, ±5 V/+5 V
SPST Switches
ADG601/ADG602
FEATURES
Low on resistance, 2.5 Ω maximum
<0.65 Ω on-resistance flatness
Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V supplies
Rail-to-rail input signal range
Tiny, 6-lead SOT-23; 8-lead MSOP; and 820 μm × 2255 μm die
Low power consumption
TTL-/CMOS-compatible inputs
S
FUNCTIONAL BLOCK DIAGRAMS
D
S
D
IN
IN
02619-001
ADG601
ADG602
NOTES
1. SWITCHES SHOWN FOR A LOGIC 0 INPUT.
Figure 1.
APPLICATIONS
Automatic test equipment
Power routing
Communication systems
Data acquisition systems
Sample-and-hold systems
Avionics
Relay replacement
Battery-powered systems
Table 1. Truth Table
ADG601 IN
0
1
ADG602 IN
1
0
Switch Condition
Off
On
GENERAL DESCRIPTION
The ADG601/ADG602 are monolithic, CMOS single-pole
single-throw (SPST) switches with on resistance typically less
than 2.5 Ω. The low on-resistance flatness makes the
ADG601/ADG602 ideally suited to many applications,
particularly those requiring low distortion. These switches are
ideal replacements for mechanical relays because they are more
reliable, have lower power requirements, and are available in
much smaller package sizes.
The ADG601 is a normally open (NO) switch, and the ADG602
is a normally closed (NC) switch. Each switch conducts equally
well in both directions when the device is on, with the input
signal range extending to the supply rails.
The switches are available in tiny, 6-lead SOT-23; 8-lead MSOP;
and 820 μm × 2255 μm die.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
Low on resistance (2 Ω typical)
Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V supplies
Tiny, 6-lead SOT-23; 8-lead MSOP; and 820 μm × 2255 μm die
Rail-to-rail input signal range
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2001–2007 Analog Devices, Inc. All rights reserved.
ADG601/ADG602
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagrams............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Dual Supply ................................................................................... 3
Single Supply ................................................................................. 4
Absolute Maximum Ratings ............................................................5
ESD Caution...................................................................................5
Pin Configurations and Function Descriptions ............................6
Typical Performance Characteristics ..............................................7
Terminology .......................................................................................9
Test Circuits..................................................................................... 10
Outline Dimensions ....................................................................... 11
Ordering Guide .......................................................................... 11
REVISION HISTORY
3/07—Rev. B to Rev. C
Added Die Package.............................................................Universal
Changes to Specifications .................................................................3
Added Figure 4 and Table 6..............................................................6
Changes to Ordering Guide .......................................................... 11
3/06—Rev. A to Rev. B
Updated Format..................................................................Universal
Changes to 6-Lead SOT-23 (RJ-6) Pin Configuration .................6
Added Pin Function Descriptions Table ........................................6
Changes to Figure 19.........................................................................9
Updated Outline Dimensions........................................................11
Changes to Ordering Guide ...........................................................11
6/03—Rev. 0 to Rev. A
Changes to Specifications.................................................................2
Changes to Ordering Guide .............................................................4
Updated Outline Dimensions..........................................................8
Rev. C | Page 2 of 12
ADG601/ADG602
SPECIFICATIONS
DUAL SUPPLY
V
DD
= 5 V ± 10%, V
SS
= –5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (R
ON
)
On-Resistance Flatness (R
FLAT (ON)
)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off )
Drain Off Leakage, I
D
(Off )
Channel On Leakage, I
D
, I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
2
t
ON
t
OFF
Charge Injection
Off Isolation
Bandwidth −3 dB
C
S
(Off )
C
D
(Off )
C
D
, C
S
(On)
POWER REQUIREMENTS
I
DD
I
SS
+25°C
B Version
1
−40°C to +85°C
V
SS
to V
DD
2
2.5
0.35
0.6
±0.01
±0.25
±0.01
±0.25
±0.01
±0.25
5.5
0.4
0.65
Unit
V
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
pC typ
dB typ
MHz typ
pF typ
pF typ
pF typ
μA typ
μA max
μA typ
μA max
Test Conditions/Comments
V
DD
= +4.5 V, V
SS
= –4.5 V
V
S
= ±4.5 V, I
DS
= −10 mA; see Figure 15
V
S
= ±3.3 V, I
DS
= −10 mA
V
DD
= +5.5 V, V
SS
= −5.5 V
V
S
= +4.5 V/−4.5 V, V
D
= −4.5 V/+4.5 V; see Figure 16
V
S
= +4.5 V/−4.5 V, V
D
= −4.5 V/+4.5 V; see Figure 16
V
S
= V
D
= +4.5 V or −4.5 V; see Figure 17
±1
±1
±1
2.4
0.8
0.005
±0.1
2
80
120
45
75
250
−60
180
50
50
145
0.001
1.0
0.001
1.0
V
IN
= V
INL
or V
INH
155
90
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 3.3 V; see Figure 18
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 3.3 V; see Figure 18
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 19
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 20
R
L
= 50 Ω, C
L
= 5 pF; see Figure 21
f = 1 MHz
f = 1 MHz
f = 1 MHz
V
DD
= +5.5 V, V
SS
= −5.5 V
Digital inputs = 0 V or 5.5 V
Digital inputs = 0 V or 5.5 V
1
2
Temperature range for B version is −40°C to +85°C.
Guaranteed by design, not subject to production test.
Rev. C | Page 3 of 12
ADG601/ADG602
SINGLE SUPPLY
V
DD
= 5 V ± 10%, V
SS
= 0 V, GND = 0 V, unless otherwise noted.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (R
ON
)
On-Resistance Flatness (R
FLAT (ON)
)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off )
Drain Off Leakage, I
D
(Off )
Channel On Leakage, I
D
, I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
2
t
ON
t
OFF
Charge Injection
Off Isolation
Bandwidth –3 dB
C
S
(Off )
C
D
(Off )
C
D
, C
S
(On)
POWER REQUIREMENTS
I
DD
+25°C
B Version
1
−40°C to +85°C
0 V to V
DD
3.5
5
0.2
8
0.2
0.6
Unit
V
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
pC typ
dB typ
MHz typ
pF typ
pF typ
pF typ
μA typ
μA max
Test Conditions/Comments
V
DD
= 4.5 V
V
S
= 0 V to 4.5 V, I
DS
= −10 mA; see Figure 15
V
S
= 1.5 V to 3.3 V, I
DS
= –10 mA
V
DD
= 5.5 V
V
S
= 4.5 V/1 V, V
D
= 1 V/4.5 V; see Figure 16
V
S
= 4.5 V/1 V, V
D
= 1 V/4.5 V; see Figure 16
V
S
= V
D
= 4.5 V or 1 V; see Figure 17
±0.01
±0.25
±0.01
±0.25
±0.01
±0.25
±1
±1
±1
2.4
0.8
0.005
±0.1
2
110
220
50
80
20
−60
180
50
50
145
0.001
1.0
V
IN
= V
INL
or V
INH
280
110
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 3.3 V; see Figure 18
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 3.3 V; see Figure 18
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 19
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 20
R
L
= 50 Ω, C
L
= 5 pF; see Figure 21
f = 1 MHz
f = 1 MHz
f = 1 MHz
V
DD
= 5.5 V
Digital inputs = 0 V or 5.5 V
1
2
Temperature range for B version is −40°C to +85°C.
Guaranteed by design, not subject to production test.
Rev. C | Page 4 of 12
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