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PIC16LF15324-I/GZ

Description
RISC Microcontroller
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size6MB,557 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Download Datasheet Parametric View All

PIC16LF15324-I/GZ Overview

RISC Microcontroller

PIC16LF15324-I/GZ Parametric

Parameter NameAttribute value
MakerMicrochip
Reach Compliance Codecompliant
uPs/uCs/peripheral integrated circuit typeMICROCONTROLLER, RISC

PIC16LF15324-I/GZ Preview

PIC16(L)F15324/44
Full-Featured 14/16/20-Pin Microcontrollers
Description
PIC16(L)F15324/44 microcontrollers feature Analog, Core Independent Peripherals and Communication Peripherals,
combined with eXtreme Low-Power (XLP) technology for a wide range of general purpose and low-power applications.
The devices feature multiple PWMs, multiple communication, temperature sensor, and memory features like Memory
Access Partition (MAP) to support customers in data protection and bootloader applications, and Device Information
Area (DIA) which stores factory calibration values to help improve temperature sensor accuracy.
Core Features
• C Compiler Optimized RISC Architecture
• Operating Speed:
- DC – 32 MHz clock input
- 125 ns minimum instruction cycle
• Interrupt Capability
• 16-Level Deep Hardware Stack
• Timers:
- 8-bit Timer2 with Hardware Limit Timer (HLT)
- 16-bit Timer0/1
• Low-Current Power-on Reset (POR)
• Configurable Power-up Timer (PWRTE)
• Brown-out Reset (BOR)
• Low-Power BOR (LPBOR) Option
• Windowed Watchdog Timer (WWDT):
- Variable prescaler selection
- Variable window size selection
- All sources configurable in hardware or
software
• Programmable Code Protection
Power-Saving Functionality
• DOZE mode: Ability to Run the CPU Core Slower
than the System Clock
• IDLE mode: Ability to halt CPU Core while Internal
Peripherals Continue Operating
• SLEEP mode: Lowest Power Consumption
• Peripheral Module Disable (PMD):
- Ability to disable hardware module to
minimize active power consumption of
unused peripherals
eXtreme Low-Power (XLP) Features
• Sleep mode: 50 nA @ 1.8V, typical
• Watchdog Timer: 500 nA @ 1.8V, typical
• Operating Current:
- 8
A
@ 32 kHz, 1.8V, typical
- 32
A/MHz
@ 1.8V, typical
Digital Peripherals
• Four Configurable Logic Cells (CLC):
- Integrated combinational and sequential logic
• Complementary Waveform Generator (CWG):
- Rising and falling edge dead-band control
- Full-bridge, half-bridge, 1-channel drive
- Multiple signal sources
• Two Capture/Compare/PWM (CCP) module:
- 16-bit resolution for Capture/Compare modes
- 10-bit resolution for PWM mode
• Four 10-Bit PWMs
• Numerically Controlled Oscillator (NCO):
- Generates true linear frequency control and
increased frequency resolution
- Input Clock: 0 Hz < F
NCO
< 32 MHz
- Resolution: F
NCO
/2
20
• Two EUSART, RS-232, RS-485, LIN compatible
Memory
7 KB Flash Program Memory
512 Bytes Data SRAM
Direct, Indirect and Relative Addressing modes
Memory Access Partition (MAP):
- Write protect
- Customizable Partition
• Device Information Area (DIA)
• Device Configuration Information (DCI)
Operating Characteristics
• Operating Voltage Range:
- 1.8V to 3.6V (PIC16LF15324/44)
- 2.3V to 5.5V (PIC16F15324/44)
• Temperature Range:
- Industrial: -40°C to 85°C
- Extended: -40°C to 125°C
2017-2019 Microchip Technology Inc.
DS40001889B
PIC16(L)F15324/44
Digital Peripherals (Cont.)
• I/O Pins:
- Individually programmable pull-ups
- Slew rate control
- Interrupt-on-change with edge-select
- Input level selection control (ST or TTL)
- Digital open-drain enable
• Peripheral Pin Select (PPS):
- Enables pin mapping of digital I/O
Flexible Oscillator Structure
• High-Precision Internal Oscillator:
- Software selectable frequency range up to 32
MHz, ±1% typical
• x2/x4 PLL with Internal and External Sources
• Low-Power Internal 31 kHz Oscillator
(LFINTOSC)
• External Oscillator Block with:
- Three crystal/resonator modes up to 20 MHz
- Three external clock modes up to 32 MHz
• Fail-Safe Clock Monitor:
- Allows for safe shutdown if primary clock
stops
• Oscillator Start-up Timer (OST):
- Ensures stability of crystal oscillator
resources
Analog Peripherals
• Analog-to-Digital Converter (ADC):
- 10-bit with up to 43 external channels
- Operates in Sleep
• Two Comparators:
- FVR, DAC and external input pin available on
inverting and noninverting input
- Software selectable hysteresis
- Outputs available internally to other modules,
or externally through PPS
• 5-Bit Digital-to-Analog Converter (DAC):
- 5-bit resolution, rail-to-rail
- Positive Reference Selection
- Unbuffered I/O pin output
- Internal connections to ADCs and
comparators
• Voltage Reference:
- Fixed Voltage Reference with 1.024V, 2.048V
and 4.096V output levels
• Zero-Cross Detect module:
- AC high voltage zero-crossing detection for
simplifying TRIAC control
- Synchronized switching control and timing
2017-2019 Microchip Technology Inc.
DS40001889B-page 2
PIC16(L)F15324/44
TABLE 1:
PIC16(L)F153XX FAMILY TYPES
Program Flash Memory (KW)
Program Flash Memory (KB)
Peripheral Module Disable
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Memory Access Partition
Window Watchdog Timer
Device Information Area
Storage Area Flash (B)
Zero-Cross Detect
Temperature Indicator
8-bit/ (with HLT) Timer
Peripheral Pin Select
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
EUSART/ I
2
C-SPI
Data Sheet Index
CCP/10-bit PWM
16-bit Timer
Comparator
Data SRAM
(bytes)
10-bit ADC
5-bit DAC
Device
PIC16(L)F15313
(C)
PIC16(L)F15323
(C)
PIC16(L)F15324
(D)
PIC16(L)F15325
(B)
PIC16(L)F15344
(D)
PIC16(L)F15345
(B)
PIC16(L)F15354
(A)
PIC16(L)F15355
(A)
PIC16(L)F15375
(E)
PIC16(L)F15385
(E)
Note 1:
2
2
4
8
4
8
4
8
8
8
3.5 224 256
3.5 224 256
7
7
7
224 512
224 512
224 512
6
12
12
18
25
5
11
11
11
17
17
24
24
24
35
35
43
43
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
2/4
2/4
2/4
2/4
2/4
2/4
2/4
2/4
2/4
2/4
2/4
2/4
2/4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
4 Y Y
4 Y Y
4 Y Y
4 Y Y
4 Y Y
4 Y Y
4 Y Y
4 Y Y
4 Y Y
4 Y Y
4 Y Y
4 Y Y
4 Y Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y 1/1
Y 1/1
Y 2/1
Y 2/1
Y 2/1
Y 2/1
Y 2/2
Y 2/2
Y 2/2
Y 2/2
Y 2/2
Y 2/2
Y 2/2
14 224 1024 12
14 224 1024 18
14 224 1024 25
28 224 2048 25
14 224 1024 36
28 224 2048 36
14 224 1024 44
28 224 2048 44
PIC16(L)F15356
(E)
16
PIC16(L)F15376
(E)
16
PIC16(L)F15386
(E)
16
Data Sheet Index:
A: DS40001853
B:
C:
D:
E:
Note:
DS40001865
Future Release
DS40001889
DS40001866
I - Debugging integrated on chip.
PIC16(L)F15354/5 Data Sheet, 28-Pin
PIC16(L)F15325/45 Data Sheet, 14/20-Pin
PIC16(L)F15313/23 Data Sheet, 8/14-Pin
PIC16(L)F15324/44 Data Sheet, 14/20-Pin
PIC16(L)F15356/75/76/85/86 Data Sheet, 28/40/48-Pin
For other small form-factor package availability and marking information, visit
www.microchip.com/packaging
or
contact your local sales office.
2017-2019 Microchip Technology Inc.
DS40001889B-page 3
Debug
(1)
I
I
I
I
I
I
I
I
I
I
I
I
I
I/OPins
CWG
NCO
CLC
PIC16(L)F15324/44
TABLE 2:
Device
PIC16(L)F15324
PIC16(L)F15344
PACKAGES
(S)PDIP
SOIC
SSOP
TSSOP
UQFN (4x4)
2017-2019 Microchip Technology Inc.
DS40001889B-page 4
PIC16(L)F15324/44
PIN DIAGRAMS
14-PIN PDIP, SOIC, TSSOP
V
DD
RA5
RA4
V
PP
/MCLR/RA3
RC5
RC4
RC3
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
SS
RA0/ICSPDAT
RA1/ICSPCLK
RA2
RC0
RC1
RC2
Note:
See
Table 3
for location of all peripheral functions.
20-PIN PDIP, SOIC, SSOP
V
DD
1
RA5 2
RA4 3
MCLR/V
PP
/RA3 4
RC5 5
RC4 6
RC3 7
RC6 8
RC7 9
RB7 10
PIC16(L)F15324
20
19
18
PIC16(L)F15344
V
SS
RA0/ICSPDAT
RA1/ICSPCLK
RA2
RC0
RC1
RC2
RB4
RB5
RB6
17
16
15
14
13
12
11
Note:
See
Table 4
for location of all peripheral functions.
16 15 14 13
RA5
RA4
MCLR/V
PP
/RA3
RC5
V
DD
NC
NC
Vss
16-PIN UQFN/VQFN (4X4)
1
2
3
4
PIC16(L)F15324
12
11
10
9
RA0/ICSPDAT
RA1/ICSPCLK
RA2
RC0
5 6 7 8
Note 1:
2:
See
Table 3
for location of all peripheral functions.
It is recommended that the exposed bottom pad be connected to V
SS
.
2017-2019 Microchip Technology Inc.
RC4
RC3
RC2
RC1
DS40001889B-page 5

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