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BUS-65112-170

Description
Mil-Std-1553 Controller, 2 Channel(s), 0.125MBps, CMOS, HERMETIC SEALED, DDIP-78
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size70KB,4 Pages
ManufacturerData Device Corporation
Download Datasheet Parametric View All

BUS-65112-170 Overview

Mil-Std-1553 Controller, 2 Channel(s), 0.125MBps, CMOS, HERMETIC SEALED, DDIP-78

BUS-65112-170 Parametric

Parameter NameAttribute value
MakerData Device Corporation
Parts packaging codeQIP
package instructionQIP,
Contacts78
Reach Compliance Codeunknown
Address bus width12
boundary scanNO
maximum clock frequency12 MHz
letter of agreementMIL-STD-1553
Data encoding/decoding methodsBIPH-LEVEL(MANCHESTER)
Maximum data transfer rate0.125 MBps
External data bus width16
JESD-30 codeR-XQIP-P78
low power modeNO
Number of serial I/Os2
Number of terminals78
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialUNSPECIFIED
encapsulated codeQIP
Package shapeRECTANGULAR
Package formIN-LINE
Certification statusNot Qualified
Maximum seat height5.334 mm
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal formPIN/PEG
Terminal pitch2.54 mm
Terminal locationQUAD
width41.91 mm
uPs/uCs/peripheral integrated circuit typeSERIAL IO/COMMUNICATION CONTROLLER, MIL-STD-1553
BUS-65112 and BUS-65117
MIL-STD-1553 DUAL REDUNDANT
REMOTE TERMINAL HYBRID
FEATURES
BUS-65112 DDIP
BUS-65117 Flat Pack
Small Size and Low Power
Complete RTU Protocol
Supports 13 Mode Codes:
Any Combination Can be Illegalized
DESCRIPTION
The BUS-65112 is a complete dual
redundant MIL-STD-1553 Remote
Terminal Unit (RTU) packaged in a
small 1.9” x 2.1” hybrid. Based upon
DDC custom ICs, it includes two
transceivers, two encoder/decoders,
two bit processors, RTU protocol,
data buffers, and timing control
logic. It supports all 13 mode codes
for dual redundant operation, any
combination of which can be illegal-
ized.
Parallel data transfers are accom-
plished with a DMA-type hand-
shaking, compatible with most CPU
types. Data transfers to/from memo-
ry are simplified by the latched com-
mand word and word count out-
puts. Error detection and recovery
are enhanced by BUS-65112 spe-
cial features. A 14-bit built-in-test
word register stores RTU informa-
tion, and sends it to the Bus
Controller in response to the Mode
Command Transmit Bit Word. The
BUS-65112 performs continuous
on-line wraparound self-test, and
provides four error flags to the host
CPU. Inputs are provided for host
CPU control of six bits of the RTU
Status Word.
Its small hermetic package, -55°C to
+125°C operating temperature
range, and complete RTU operation
make the BUS-65112 ideal for most
MIL-STD-1553 applications.
Transfers Data with DMA-Type
Handshaking
Latched Outputs for Command Word
and Word Count
14-Bit Built-in-Test Word Register
Four Error Flag Outputs
Continuous Online Self-Test
Plug-in and Flat Pack Packaging
DATA
BUS A
TRANSCEIVER
ENCODER/
DECODER
BIT
PROCESSOR
BUFFER
DB0-DB15
BUF ENA
DTREQ
DTGRT
DTACK
DTSTB
R/W
A5
TRANSFER
CONTROLS
DATA
BUS B
TRANSCEIVER
ENCODER/
DECODER
BIT
PROCESSOR
CURRENT
WORD
COUNTER
MUX
PROTOCOL
SEQUENCER
AND
CONTROL
LOGIC
COMMAND
LATCH
A0-A4
A6-A11
DAT/CMD
ILL CMD (ME)
SS REQ
ADBC
RT FLAG
SS BUSY
SS FLAG
MESS ERR
RT FAIL
HS FAIL
RTADD ERR
NBGT
INCMD
BITEN
STATEN
GBR
STATUS
REGISTER
ERROR FLAGS
TIMING FLAGS
BU-65112/655117 BLOCK DIAGRAM
©
1995, 1999 Data Device Corporation
M
Custom DDC Monolithics utilized in this product are copyright under the Semiconductor Chip Protection Act.

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