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FST3126 4-Bit Bus Switch
August 1997
Revised January 2005
FST3126
4-Bit Bus Switch
General Description
The Fairchild Switch FST3126 provides four high-speed
CMOS TTL-compatible bus switches. The low on resis-
tance of the switch allows inputs to be connected to out-
puts without adding propagation delay or generating
additional ground bounce noise.
The device is organized as four 1-bit switches with sepa-
rate OE inputs. When OE is HIGH, the switch is ON and
Port A is connected to Port B. When OE is LOW, the switch
is OPEN and a high-impedance state exists between the
two ports.
Features
s
4
Ω
switch connection between two ports.
s
Minimal propagation delay through the switch.
s
Low l
CC
.
s
Zero bounce in flow-through mode.
s
Control inputs compatible with TTL level.
Ordering Code:
Order Number
FST3126M
FST3126QSC
FST3126MTC
Package Number
M14A
MQA16
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagrams
Pin Assignment for SOIC and TSSOP
Pin Assignment for QSOP
Pin Descriptions
Pin Name
OE
1
, OE
2
, OE
3
, OE
4
1A, 2A, 3A, 4A
1B, 2B, 3B, 4B
NC
Description
Bus Switch Enables
Bus A
Bus B
Not Connected
Truth Table
Inputs
OE
L
H
Inputs/Outputs
A,B
Z
A
=
B
© 2005 Fairchild Semiconductor Corporation
DS500044
www.fairchildsemi.com
FST3126
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Switch Voltage (V
S
)
DC Input Voltage (V
IN
) (Note 2)
DC Input Diode Current (l
IK
) V
IN
<
0V
DC Output (I
OUT
) Sink Current
DC V
CC
/GND Current (I
CC
/I
GND
)
Storage Temperature Range (T
STG
)
−
0.5V to
+
7.0V
−
0.5V to
+
7.0V
−
0.5V to
+
7.0V
−
50mA
128mA
Recommended Operating
Conditions
(Note 3)
Power Supply Operating (V
CC)
Input Voltage (V
IN
)
Output Voltage (V
OUT
)
Input Rise and Fall Time (t
r
, t
f
)
Switch Control Input
Switch I/O
Free Air Operating Temperature (T
A
)
0nS/V to 5nS/V
0nS/V to DC
4.0V to 5.5V
0V to 5.5V
0V to 5.5V
+
/
−
100mA
−
65
°
C to
+
150
°
C
−
40
°
C to
+
85
°
C
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2:
The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3:
Unused control inputs must be held high or low. They may not float.
DC Electrical Characteristics
Symbol
V
IK
V
IH
V
IL
I
I
I
OZ
R
ON
Parameter
Clamp Diode Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
Input Leakage Current
OFF-STATE Leakage Current
Switch On Resistance
(Note 5)
V
CC
(V)
4.5
4.0–5.5
4.0–5.5
5.5
5.5
4.5
4.5
4.5
4.0
I
CC
∆I
CC
Quiescent Supply Current
Increase in I
CC
per Input
5.5
5.5
4
4
8
11
2.0
0.8
±1.0
±1.0
7
7
15
20
3
2.5
T
A
= −40 °C
to
+85 °C
Min
Typ
(Note 4)
Max
−1.2
Units
V
V
V
µA
µA
Ω
Ω
Ω
Ω
µA
mA
0≤ V
IN
≤5.5V
0
≤A,
B
≤V
CC
V
IN
=
0V, I
IN
=
64mA
V
IN
=
0V, I
IN
=
30mA
V
IN
=
2.4V, I
IN
=
15mA
V
IN
=
2.4V, I
IN
=
15mA
V
IN
=
V
CC
or GND,
I
OUT
=
0
One input at 3.4V.
Other inputs at V
CC
or GND
Note 4:
Typical values are at V
CC
=
5.0V and T
A
= +25°C
Note 5:
Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
Conditions
I
IN
= −18mA
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2
FST3126
AC Electrical Characteristics
T
A
= −40 °C
to
+85 °C,
C
L
=
50pF, RU
=
RD
=
500Ω
Symbol
Parameter
V
CC
=
4.5
−
5.5V
Min
t
PHL
,t
PLH
t
PZH
, t
PZL
t
PHZ
, t
PLZ
Prop Delay Bus to Bus (Note 6)
Output Enable Time
Output Disable Time
1.0
1.5
Max
0.25
4.5
5.7
V
CC
=
4.0V
Min
Max
0.25
5.0
6.2
ns
ns
ns
V
I
=
OPEN
V
I
=
7V for t
PZL
V
I
=
OPEN for t
PZH
V
I
=
7V for t
PLZ
V
I
=
OPEN for t
PHZ
Figures 1, 2
Figures 1, 2
Figures 1, 2
Units
Conditions
Figure No.
Note 6:
This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
C
IN
C
I/O
(Note 7)
Parameter
Typ
3
5
Max
Units
pF
pF
V
CC
=
5.0V
V
CC
=
5.0V, OE
=
0V
Conditions
Control Pin Input Capacitance
Input/Output Capacitance
Note 7:
T
A
= +25°C,
f
=
1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note:
Input driven by 50
Ω
source terminated in 50
Ω
Note:
C
L
includes load and stray capacitance
Note:
Input PRR
=
1.0MHz, t
W
=
500ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
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FST3126
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
Package Number MQA16
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