Small Signal Field-Effect Transistor, 2.4A I(D), 20V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, SUPERSOT-3
FDN302P_NL Parametric
Parameter Name
Attribute value
Is it Rohs certified?
conform to
Maker
Fairchild
Parts packaging code
SOT
package instruction
SMALL OUTLINE, R-PDSO-G3
Contacts
3
Manufacturer packaging code
SUPERSOT
Reach Compliance Code
compliant
ECCN code
EAR99
Configuration
SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage
20 V
Maximum drain current (Abs) (ID)
2.4 A
Maximum drain current (ID)
2.4 A
Maximum drain-source on-resistance
0.055 Ω
FET technology
METAL-OXIDE SEMICONDUCTOR
JESD-30 code
R-PDSO-G3
JESD-609 code
e3
Humidity sensitivity level
1
Number of components
1
Number of terminals
3
Operating mode
ENHANCEMENT MODE
Maximum operating temperature
150 °C
Package body material
PLASTIC/EPOXY
Package shape
RECTANGULAR
Package form
SMALL OUTLINE
Peak Reflow Temperature (Celsius)
NOT SPECIFIED
Polarity/channel type
P-CHANNEL
Maximum power dissipation(Abs)
0.5 W
Certification status
Not Qualified
surface mount
YES
Terminal surface
Matte Tin (Sn)
Terminal form
GULL WING
Terminal location
DUAL
Maximum time at peak reflow temperature
NOT SPECIFIED
transistor applications
SWITCHING
Transistor component materials
SILICON
FDN302P_NL Preview
FDN302P
October 2000
FDN302P
P-Channel 2.5V Specified PowerTrench
MOSFET
General Description
This P-Channel 2.5V specified MOSFET uses a rugged
gate version of Fairchild’s advanced PowerTrench
process. It has been optimized for power management
applications with a wide range of gate drive voltage
(2.5V – 12V).
Features
•
–20 V, –2.4 A.
R
DS(ON)
= 0.055
Ω
@ V
GS
= –4.5 V
R
DS(ON)
= 0.080
Ω
@ V
GS
= –2.5 V
•
Fast switching speed
•
High performance trench technology for extremely
low R
DS(ON)
•
SuperSOT
TM
-3 provides low R
DS(ON)
and 30% higher
power handling capability than SOT23 in the same
footprint
Applications
•
Power management
•
Load switch
•
Battery protection
D
D
S
G
S
SuperSOT -3
TM
G
T
A
=25
o
C unless otherwise noted
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
T
J
, T
STG
Drain-Source Voltage
Gate-Source Voltage
Drain Current
– Continuous
– Pulsed
Maximum Power Dissipation
Parameter
Ratings
–
20
±12
(Note 1a)
Units
V
V
A
W
°C
–
2.4
–
10
0.5
0.46
(Note 1a)
(Note 1b)
Operating and Storage Junction Temperature Range
–
55 to +150
250
75
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
°C/W
°C/W
Package Marking and Ordering Information
Device Marking
302
Device
FDN302P
Reel Size
7’’
Tape width
8mm
Quantity
3000 units
2000
Fairchild Semiconductor Corporation
FDN302P Rev C(W)
FDN302P
Electrical Characteristics
Symbol
BV
DSS
∆BV
DSS
===∆T
J
I
DSS
I
GSSF
I
GSSR
T
A
= 25°C unless otherwise noted
Parameter
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
(Note 2)
Test Conditions
V
GS
= 0 V, I
D
= –250
µA
I
D
= –250
µA,
Referenced to 25°C
V
DS
= –16 V,
V
GS
= 12 V,
V
GS
= –12 V
V
GS
= 0 V
V
DS
= 0 V
V
DS
= 0 V
Min
–20
Typ
Max Units
V
Off Characteristics
–12
–1
100
–100
mV/°C
µA
nA
nA
On Characteristics
V
GS(th)
∆V
GS(th)
===∆T
J
R
DS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
On–State Drain Current
Forward Transconductance
V
DS
= V
GS
, I
D
= –250
µA
I
D
= –250
µA,
Referenced to 25°C
V
GS
= –4.5 V,
I
D
= –2.4 A
I
D
= –2 A
V
GS
= –2.5 V,
V
GS
= –4.5 V, I
D
= –2.4A, T
J
=125°C
V
GS
= –4.5 V,
V
DS
= –5 V,
V
DS
= –5 V
I
D
= –2.4 A
–0.6
–1.0
3
44
64
58
–1.5
V
mV/°C
55
80
84
mΩ
I
D(on)
g
FS
–10
10
A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
(Note 2)
V
DS
= –10 V,
f = 1.0 MHz
V
GS
= 0 V,
882
211
112
pF
pF
pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
I
S
V
SD
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
V
DD
= –10 V,
V
GS
= –4.5 V,
I
D
= –1 A,
R
GEN
= 6
Ω
13
11
25
15
23
20
40
27
14
ns
ns
ns
ns
nC
nC
nC
V
DS
= –10 V,
V
GS
= –4.5 V
I
D
= –2.4 A,
9
2
3
Drain–Source Diode Characteristics and Maximum Ratings
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
V
GS
= 0 V,
I
S
= –0.42
(Note 2)
–0.42
–0.7
–1.2
A
V
Notes:
1.
R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θJC
is guaranteed by design while R
θCA
is determined by the user's board design.
a) 250°C/W when mounted on a
0.02 in
2
pad of 2 oz. copper.
b) 270°C/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width
≤=300 µs,
Duty Cycle
≤=2.0%
FDN302P Rev C(W)
FDN302P
Typical Characteristics
15
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
3
V
GS
= -4.5V
-I
D
, DRAIN CURRENT (A)
12
-4.0V
-3.0V
-3.5V
-2.5V
V
GS
= -2.0V
2.5
9
2
-2.5V
1.5
-3.0V
-3.5V
-4.0V
1
-4.5V
6
-2.0V
3
0
0
0.5
1
1.5
2
2.5
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
0.5
0
3
6
9
12
15
-I
D
, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.16
R
DS(ON)
, ON-RESISTANCE (OHM)
I
D
= -1.2 A
0.14
0.12
0.1
T
A
= 125
o
C
0.08
0.06
T
A
= 25
o
C
0.04
0.02
1.5
2
2.5
3
3.5
4
4.5
5
-V
GS
, GATE TO SOURCE VOLTAGE (V)
1.5
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
I
D
= -2.4A
V
GS
= -4.5V
Figure 3. On-Resistance Variation with
Temperature.
12
10
-I
D
, DRAIN CURRENT (A)
-55
o
C
8
6
4
2
0
0.5
1
1.5
2
2.5
3
-V
GS
, GATE TO SOURCE VOLTAGE (V)
-I
S
, REVERSE DRAIN CURRENT (A)
V
DS
= - 5V
T
A
= 125
o
C
25
o
C
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
10
V
GS
= 0V
1
T
A
= 125
o
C
25
o
C
0.01
-55
o
C
0.1
0.001
0.0001
0
0.2
0.4
0.6
0.8
1
1.2
-V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDN302P Rev C(W)
FDN302P
Typical Characteristics
5
-V
GS
, GATE-SOURCE VOLTAGE (V)
I
D
= -2.4A
4
CAPACITANCE (pF)
-15V
3
V
DS
= -5V
-10V
1400
1200
1000
800
600
400
C
OSS
200
C
RSS
0
2
4
6
8
10
12
C
ISS
f = 1MHz
V
GS
= 0 V
2
1
0
0
2
4
6
8
10
Q
g
, GATE CHARGE (nC)
0
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
100
R
DS(ON)
LIMIT
-I
D
, DRAIN CURRENT (A)
10
10ms
100ms
1
V
GS
=-4.5V
SINGLE PULSE
R
θJA
= 270
o
C/W
T
A
= 25
o
C
0.01
0.1
1
10
100
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
DC
1s
10s
1ms
P(pk), PEAK TRANSIENT POWER (W)
20
Figure 8. Capacitance Characteristics.
SINGLE PULSE
R
θJA
= 270°C/W
T
A
= 25°C
15
10
0.1
5
0
0.001
0.01
0.1
1
t
1
, TIME (sec)
10
100
1000
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
D = 0.5
0.2
0.1
0.1
0.05
0.02
R
θJA
(t) = r(t) + R
θJA
R
θJA
= 270 °C/W
P(pk)
t
1
t
2
SINGLE PULSE
0.01
0.01
T
J
- T
A
= P * R
θJA
(t)
Duty Cycle, D = t
1
/ t
2
0.001
0.0001
0.001
0.01
0.1
t
1
, TIME (sec)
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient themal response will change depending on the circuit board design.
FDN302P Rev C(W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DOME™
E
2
CMOS
TM
EnSigna
TM
FACT™
FACT Quiet Series™
FAST
®
DISCLAIMER
FASTr™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
POP™
PowerTrench
®
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
VCX™
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Advance Information
Product Status
Formative or
In Design
Definition
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
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